From 0063454affb3c5a595539a3cad9e20e7229d8fac Mon Sep 17 00:00:00 2001 From: Philippe Mathieu-Daudé Date: Sat, 2 Feb 2019 20:48:46 +0100 Subject: hw/pci-host/piix: Move RCR_IOPORT register definition The RCR_IOPORT register belongs to the PIIX chipset. Move the definition to "piix.h", and prepend the PIIX prefix. Reviewed-by: Aleksandar Markovic Signed-off-by: Philippe Mathieu-Daudé --- include/hw/i386/pc.h | 6 ------ include/hw/southbridge/piix.h | 6 ++++++ 2 files changed, 6 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 2fd40ceebe..d6ff95e047 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -240,12 +240,6 @@ typedef struct PCII440FXState PCII440FXState; #define TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE "igd-passthrough-i440FX" -/* - * Reset Control Register: PCI-accessible ISA-Compatible Register at address - * 0xcf9, provided by the PCI/ISA bridge (PIIX3 PCI function 0, 8086:7000). - */ -#define RCR_IOPORT 0xcf9 - PCIBus *i440fx_init(const char *host_type, const char *pci_type, PCII440FXState **pi440fx_state, int *piix_devfn, ISABus **isa_bus, qemu_irq *pic, diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h index add352456b..e49d4a6bbe 100644 --- a/include/hw/southbridge/piix.h +++ b/include/hw/southbridge/piix.h @@ -18,6 +18,12 @@ I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, qemu_irq sci_irq, qemu_irq smi_irq, int smm_enabled, DeviceState **piix4_pm); +/* + * Reset Control Register: PCI-accessible ISA-Compatible Register at address + * 0xcf9, provided by the PCI/ISA bridge (PIIX3 PCI function 0, 8086:7000). + */ +#define PIIX_RCR_IOPORT 0xcf9 + extern PCIDevice *piix4_dev; DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, -- cgit v1.2.3-55-g7522