From 0d34282fdde1d8f337d2a9e10f5ac793b12ef2e7 Mon Sep 17 00:00:00 2001 From: Andreas Färber Date: Mon, 17 Dec 2012 07:12:13 +0100 Subject: cpu: Move host_tid field to CPUState Change gdbstub's cpu_index() argument to CPUState now that CPUArchState is no longer used. Signed-off-by: Andreas Färber --- include/exec/cpu-defs.h | 1 - include/exec/gdbstub.h | 5 ++--- include/qom/cpu.h | 2 ++ 3 files changed, 4 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h index 2911b9fc90..ae832a9f83 100644 --- a/include/exec/cpu-defs.h +++ b/include/exec/cpu-defs.h @@ -191,7 +191,6 @@ typedef struct CPUWatchpoint { int exception_index; \ \ CPUArchState *next_cpu; /* next CPU sharing TB cache */ \ - uint32_t host_tid; /* host thread ID */ \ int running; /* Nonzero if cpu is currently running(usermode). */ \ /* user data */ \ void *opaque; \ diff --git a/include/exec/gdbstub.h b/include/exec/gdbstub.h index 49231feb29..ba20afa091 100644 --- a/include/exec/gdbstub.h +++ b/include/exec/gdbstub.h @@ -30,12 +30,11 @@ void gdb_register_coprocessor(CPUArchState *env, gdb_reg_cb get_reg, gdb_reg_cb set_reg, int num_regs, const char *xml, int g_pos); -static inline int cpu_index(CPUArchState *env) +static inline int cpu_index(CPUState *cpu) { #if defined(CONFIG_USER_ONLY) && defined(CONFIG_USE_NPTL) - return env->host_tid; + return cpu->host_tid; #else - CPUState *cpu = ENV_GET_CPU(env); return cpu->cpu_index + 1; #endif } diff --git a/include/qom/cpu.h b/include/qom/cpu.h index 46f2247274..e371655d15 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -65,6 +65,7 @@ struct kvm_run; * @nr_cores: Number of cores within this CPU package. * @nr_threads: Number of threads within this CPU. * @numa_node: NUMA node this CPU is belonging to. + * @host_tid: Host thread ID. * @created: Indicates whether the CPU thread has been successfully created. * @stop: Indicates a pending stop request. * @stopped: Indicates the CPU has been artificially stopped. @@ -86,6 +87,7 @@ struct CPUState { HANDLE hThread; #endif int thread_id; + uint32_t host_tid; struct QemuCond *halt_cond; struct qemu_work_item *queued_work_first, *queued_work_last; bool thread_kicked; -- cgit v1.2.3-55-g7522 From 0315c31cda054775585b31f8cb3c9228cc6fc28b Mon Sep 17 00:00:00 2001 From: Andreas Färber Date: Mon, 17 Dec 2012 07:34:52 +0100 Subject: cpu: Move running field to CPUState Pass CPUState to cpu_exec_{start,end}() functions. Signed-off-by: Andreas Färber --- include/exec/cpu-defs.h | 1 - include/qom/cpu.h | 2 ++ linux-user/main.c | 37 ++++++++++++++++++++++--------------- 3 files changed, 24 insertions(+), 16 deletions(-) (limited to 'include') diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h index ae832a9f83..ba814ff10d 100644 --- a/include/exec/cpu-defs.h +++ b/include/exec/cpu-defs.h @@ -191,7 +191,6 @@ typedef struct CPUWatchpoint { int exception_index; \ \ CPUArchState *next_cpu; /* next CPU sharing TB cache */ \ - int running; /* Nonzero if cpu is currently running(usermode). */ \ /* user data */ \ void *opaque; \ \ diff --git a/include/qom/cpu.h b/include/qom/cpu.h index e371655d15..c465d88260 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -66,6 +66,7 @@ struct kvm_run; * @nr_threads: Number of threads within this CPU. * @numa_node: NUMA node this CPU is belonging to. * @host_tid: Host thread ID. + * @running: #true if CPU is currently running (usermode). * @created: Indicates whether the CPU thread has been successfully created. * @stop: Indicates a pending stop request. * @stopped: Indicates the CPU has been artificially stopped. @@ -88,6 +89,7 @@ struct CPUState { #endif int thread_id; uint32_t host_tid; + bool running; struct QemuCond *halt_cond; struct qemu_work_item *queued_work_first, *queued_work_last; bool thread_kicked; diff --git a/linux-user/main.c b/linux-user/main.c index 146a4683a5..e51568430f 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -151,13 +151,16 @@ static inline void exclusive_idle(void) static inline void start_exclusive(void) { CPUArchState *other; + CPUState *other_cpu; + pthread_mutex_lock(&exclusive_lock); exclusive_idle(); pending_cpus = 1; /* Make all other cpus stop executing. */ for (other = first_cpu; other; other = other->next_cpu) { - if (other->running) { + other_cpu = ENV_GET_CPU(other); + if (other_cpu->running) { pending_cpus++; cpu_exit(other); } @@ -176,19 +179,19 @@ static inline void end_exclusive(void) } /* Wait for exclusive ops to finish, and begin cpu execution. */ -static inline void cpu_exec_start(CPUArchState *env) +static inline void cpu_exec_start(CPUState *cpu) { pthread_mutex_lock(&exclusive_lock); exclusive_idle(); - env->running = 1; + cpu->running = true; pthread_mutex_unlock(&exclusive_lock); } /* Mark cpu as not executing, and release pending exclusive ops. */ -static inline void cpu_exec_end(CPUArchState *env) +static inline void cpu_exec_end(CPUState *cpu) { pthread_mutex_lock(&exclusive_lock); - env->running = 0; + cpu->running = false; if (pending_cpus > 1) { pending_cpus--; if (pending_cpus == 1) { @@ -210,11 +213,11 @@ void cpu_list_unlock(void) } #else /* if !CONFIG_USE_NPTL */ /* These are no-ops because we are not threadsafe. */ -static inline void cpu_exec_start(CPUArchState *env) +static inline void cpu_exec_start(CPUState *cpu) { } -static inline void cpu_exec_end(CPUArchState *env) +static inline void cpu_exec_end(CPUState *cpu) { } @@ -697,15 +700,16 @@ done: void cpu_loop(CPUARMState *env) { + CPUState *cs = CPU(arm_env_get_cpu(env)); int trapnr; unsigned int n, insn; target_siginfo_t info; uint32_t addr; for(;;) { - cpu_exec_start(env); + cpu_exec_start(cs); trapnr = cpu_arm_exec(env); - cpu_exec_end(env); + cpu_exec_end(cs); switch(trapnr) { case EXCP_UDEF: { @@ -912,14 +916,15 @@ void cpu_loop(CPUARMState *env) void cpu_loop(CPUUniCore32State *env) { + CPUState *cs = CPU(uc32_env_get_cpu(env)); int trapnr; unsigned int n, insn; target_siginfo_t info; for (;;) { - cpu_exec_start(env); + cpu_exec_start(cs); trapnr = uc32_cpu_exec(env); - cpu_exec_end(env); + cpu_exec_end(cs); switch (trapnr) { case UC32_EXCP_PRIV: { @@ -1367,14 +1372,15 @@ static int do_store_exclusive(CPUPPCState *env) void cpu_loop(CPUPPCState *env) { + CPUState *cs = CPU(ppc_env_get_cpu(env)); target_siginfo_t info; int trapnr; target_ulong ret; for(;;) { - cpu_exec_start(env); + cpu_exec_start(cs); trapnr = cpu_ppc_exec(env); - cpu_exec_end(env); + cpu_exec_end(cs); switch(trapnr) { case POWERPC_EXCP_NONE: /* Just go on */ @@ -2184,14 +2190,15 @@ static int do_store_exclusive(CPUMIPSState *env) void cpu_loop(CPUMIPSState *env) { + CPUState *cs = CPU(mips_env_get_cpu(env)); target_siginfo_t info; int trapnr, ret; unsigned int syscall_num; for(;;) { - cpu_exec_start(env); + cpu_exec_start(cs); trapnr = cpu_mips_exec(env); - cpu_exec_end(env); + cpu_exec_end(cs); switch(trapnr) { case EXCP_SYSCALL: syscall_num = env->active_tc.gpr[2] - 4000; -- cgit v1.2.3-55-g7522 From fcd7d0034b7eddba505a548f456f452bf5a7d56c Mon Sep 17 00:00:00 2001 From: Andreas Färber Date: Mon, 17 Dec 2012 08:02:44 +0100 Subject: cpu: Move exit_request field to CPUState Since it was located before breakpoints field, it needs to be reset. Signed-off-by: Andreas Färber --- cpu-exec.c | 8 ++++---- exec.c | 4 +++- hw/spapr_hcall.c | 5 +++-- include/exec/cpu-defs.h | 2 -- include/qom/cpu.h | 2 ++ kvm-all.c | 6 +++--- qom/cpu.c | 1 + target-i386/kvm.c | 4 ++-- 8 files changed, 18 insertions(+), 14 deletions(-) (limited to 'include') diff --git a/cpu-exec.c b/cpu-exec.c index ff9a884a96..cf103f227b 100644 --- a/cpu-exec.c +++ b/cpu-exec.c @@ -196,7 +196,7 @@ int cpu_exec(CPUArchState *env) cpu_single_env = env; if (unlikely(exit_request)) { - env->exit_request = 1; + cpu->exit_request = 1; } #if defined(TARGET_I386) @@ -537,8 +537,8 @@ int cpu_exec(CPUArchState *env) next_tb = 0; } } - if (unlikely(env->exit_request)) { - env->exit_request = 0; + if (unlikely(cpu->exit_request)) { + cpu->exit_request = 0; env->exception_index = EXCP_INTERRUPT; cpu_loop_exit(env); } @@ -591,7 +591,7 @@ int cpu_exec(CPUArchState *env) starting execution if there is a pending interrupt. */ env->current_tb = tb; barrier(); - if (likely(!env->exit_request)) { + if (likely(!cpu->exit_request)) { tc_ptr = tb->tc_ptr; /* execute the generated code */ next_tb = tcg_qemu_tb_exec(env, tc_ptr); diff --git a/exec.c b/exec.c index b85508ba30..dbb893a08e 100644 --- a/exec.c +++ b/exec.c @@ -492,7 +492,9 @@ void cpu_reset_interrupt(CPUArchState *env, int mask) void cpu_exit(CPUArchState *env) { - env->exit_request = 1; + CPUState *cpu = ENV_GET_CPU(env); + + cpu->exit_request = 1; cpu_unlink_tb(env); } diff --git a/hw/spapr_hcall.c b/hw/spapr_hcall.c index 2889742788..af1db6ea08 100644 --- a/hw/spapr_hcall.c +++ b/hw/spapr_hcall.c @@ -513,13 +513,14 @@ static target_ulong h_cede(PowerPCCPU *cpu, sPAPREnvironment *spapr, target_ulong opcode, target_ulong *args) { CPUPPCState *env = &cpu->env; + CPUState *cs = CPU(cpu); env->msr |= (1ULL << MSR_EE); hreg_compute_hflags(env); - if (!cpu_has_work(CPU(cpu))) { + if (!cpu_has_work(cs)) { env->halted = 1; env->exception_index = EXCP_HLT; - env->exit_request = 1; + cs->exit_request = 1; } return H_SUCCESS; } diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h index ba814ff10d..ca39f05567 100644 --- a/include/exec/cpu-defs.h +++ b/include/exec/cpu-defs.h @@ -26,7 +26,6 @@ #include "config.h" #include #include -#include #include "qemu/osdep.h" #include "qemu/queue.h" #include "exec/hwaddr.h" @@ -160,7 +159,6 @@ typedef struct CPUWatchpoint { memory was accessed */ \ uint32_t halted; /* Nonzero if the CPU is in suspend state */ \ uint32_t interrupt_request; \ - volatile sig_atomic_t exit_request; \ CPU_COMMON_TLB \ struct TranslationBlock *tb_jmp_cache[TB_JMP_CACHE_SIZE]; \ /* buffer for temporaries in the code generator */ \ diff --git a/include/qom/cpu.h b/include/qom/cpu.h index c465d88260..42f3f34bbd 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -20,6 +20,7 @@ #ifndef QEMU_CPU_H #define QEMU_CPU_H +#include #include "hw/qdev-core.h" #include "qemu/thread.h" @@ -96,6 +97,7 @@ struct CPUState { bool created; bool stop; bool stopped; + volatile sig_atomic_t exit_request; int kvm_fd; bool kvm_vcpu_dirty; diff --git a/kvm-all.c b/kvm-all.c index 04ec2d541a..4decfdccd3 100644 --- a/kvm-all.c +++ b/kvm-all.c @@ -1537,7 +1537,7 @@ int kvm_cpu_exec(CPUArchState *env) DPRINTF("kvm_cpu_exec()\n"); if (kvm_arch_process_async_events(cpu)) { - env->exit_request = 0; + cpu->exit_request = 0; return EXCP_HLT; } @@ -1548,7 +1548,7 @@ int kvm_cpu_exec(CPUArchState *env) } kvm_arch_pre_run(cpu, run); - if (env->exit_request) { + if (cpu->exit_request) { DPRINTF("interrupt exit requested\n"); /* * KVM requires us to reenter the kernel after IO exits to complete @@ -1622,7 +1622,7 @@ int kvm_cpu_exec(CPUArchState *env) vm_stop(RUN_STATE_INTERNAL_ERROR); } - env->exit_request = 0; + cpu->exit_request = 0; return ret; } diff --git a/qom/cpu.c b/qom/cpu.c index 870e9baad9..7d8c675dd0 100644 --- a/qom/cpu.c +++ b/qom/cpu.c @@ -32,6 +32,7 @@ void cpu_reset(CPUState *cpu) static void cpu_common_reset(CPUState *cpu) { + cpu->exit_request = 0; } ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model) diff --git a/target-i386/kvm.c b/target-i386/kvm.c index 9ebf1816d9..0cf413dbfd 100644 --- a/target-i386/kvm.c +++ b/target-i386/kvm.c @@ -1777,7 +1777,7 @@ void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *run) * or pending TPR access reports. */ if (env->interrupt_request & (CPU_INTERRUPT_INIT | CPU_INTERRUPT_TPR)) { - env->exit_request = 1; + cpu->exit_request = 1; } /* Try to inject an interrupt if the guest can accept it */ @@ -1847,7 +1847,7 @@ int kvm_arch_process_async_events(CPUState *cs) if (env->exception_injected == EXCP08_DBLE) { /* this means triple fault */ qemu_system_reset_request(); - env->exit_request = 1; + cs->exit_request = 1; return 0; } env->exception_injected = EXCP12_MCHK; -- cgit v1.2.3-55-g7522 From d77953b94ff20868b21796ee22ca57baa1cfc941 Mon Sep 17 00:00:00 2001 From: Andreas Färber Date: Wed, 16 Jan 2013 19:29:31 +0100 Subject: cpu: Move current_tb field to CPUState Explictly NULL it on CPU reset since it was located before breakpoints. Change vapic_report_tpr_access() argument to CPUState. This also resolves the use of void* for cpu.h independence. Change vAPIC patch_instruction() argument to X86CPU. Signed-off-by: Andreas Färber --- cpu-exec.c | 13 ++++++++----- cputlb.c | 6 ++++-- hw/apic_common.c | 2 +- hw/apic_internal.h | 2 +- hw/kvmvapic.c | 13 ++++++++----- include/exec/cpu-defs.h | 1 - include/exec/exec-all.h | 4 +++- include/qom/cpu.h | 3 +++ qom/cpu.c | 1 + translate-all.c | 29 +++++++++++++++++++---------- 10 files changed, 48 insertions(+), 26 deletions(-) (limited to 'include') diff --git a/cpu-exec.c b/cpu-exec.c index cf103f227b..9fcfe9e0db 100644 --- a/cpu-exec.c +++ b/cpu-exec.c @@ -32,7 +32,9 @@ bool qemu_cpu_has_work(CPUState *cpu) void cpu_loop_exit(CPUArchState *env) { - env->current_tb = NULL; + CPUState *cpu = ENV_GET_CPU(env); + + cpu->current_tb = NULL; longjmp(env->jmp_env, 1); } @@ -54,6 +56,7 @@ void cpu_resume_from_signal(CPUArchState *env, void *puc) static void cpu_exec_nocache(CPUArchState *env, int max_cycles, TranslationBlock *orig_tb) { + CPUState *cpu = ENV_GET_CPU(env); tcg_target_ulong next_tb; TranslationBlock *tb; @@ -64,10 +67,10 @@ static void cpu_exec_nocache(CPUArchState *env, int max_cycles, tb = tb_gen_code(env, orig_tb->pc, orig_tb->cs_base, orig_tb->flags, max_cycles); - env->current_tb = tb; + cpu->current_tb = tb; /* execute the generated code */ next_tb = tcg_qemu_tb_exec(env, tb->tc_ptr); - env->current_tb = NULL; + cpu->current_tb = NULL; if ((next_tb & 3) == 2) { /* Restore PC. This may happen if async event occurs before @@ -589,7 +592,7 @@ int cpu_exec(CPUArchState *env) TB, but before it is linked into a potentially infinite loop and becomes env->current_tb. Avoid starting execution if there is a pending interrupt. */ - env->current_tb = tb; + cpu->current_tb = tb; barrier(); if (likely(!cpu->exit_request)) { tc_ptr = tb->tc_ptr; @@ -623,7 +626,7 @@ int cpu_exec(CPUArchState *env) } } } - env->current_tb = NULL; + cpu->current_tb = NULL; /* reset soft MMU for next block (it can currently only be set by a memory fault) */ } /* for(;;) */ diff --git a/cputlb.c b/cputlb.c index 88239c494a..aba7e44e1e 100644 --- a/cputlb.c +++ b/cputlb.c @@ -54,6 +54,7 @@ static const CPUTLBEntry s_cputlb_empty_entry = { */ void tlb_flush(CPUArchState *env, int flush_global) { + CPUState *cpu = ENV_GET_CPU(env); int i; #if defined(DEBUG_TLB) @@ -61,7 +62,7 @@ void tlb_flush(CPUArchState *env, int flush_global) #endif /* must reset current TB so that interrupts cannot modify the links while we are modifying them */ - env->current_tb = NULL; + cpu->current_tb = NULL; for (i = 0; i < CPU_TLB_SIZE; i++) { int mmu_idx; @@ -92,6 +93,7 @@ static inline void tlb_flush_entry(CPUTLBEntry *tlb_entry, target_ulong addr) void tlb_flush_page(CPUArchState *env, target_ulong addr) { + CPUState *cpu = ENV_GET_CPU(env); int i; int mmu_idx; @@ -110,7 +112,7 @@ void tlb_flush_page(CPUArchState *env, target_ulong addr) } /* must reset current TB so that interrupts cannot modify the links while we are modifying them */ - env->current_tb = NULL; + cpu->current_tb = NULL; addr &= TARGET_PAGE_MASK; i = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); diff --git a/hw/apic_common.c b/hw/apic_common.c index 6e1b1e0320..d8c9810509 100644 --- a/hw/apic_common.c +++ b/hw/apic_common.c @@ -103,7 +103,7 @@ void apic_handle_tpr_access_report(DeviceState *d, target_ulong ip, { APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d); - vapic_report_tpr_access(s->vapic, &s->cpu->env, ip, access); + vapic_report_tpr_access(s->vapic, CPU(s->cpu), ip, access); } void apic_report_irq_delivered(int delivered) diff --git a/hw/apic_internal.h b/hw/apic_internal.h index dcbbfd41cb..9265e52cd6 100644 --- a/hw/apic_internal.h +++ b/hw/apic_internal.h @@ -143,7 +143,7 @@ bool apic_next_timer(APICCommonState *s, int64_t current_time); void apic_enable_tpr_access_reporting(DeviceState *d, bool enable); void apic_enable_vapic(DeviceState *d, hwaddr paddr); -void vapic_report_tpr_access(DeviceState *dev, void *cpu, target_ulong ip, +void vapic_report_tpr_access(DeviceState *dev, CPUState *cpu, target_ulong ip, TPRAccess access); #endif /* !QEMU_APIC_INTERNAL_H */ diff --git a/hw/kvmvapic.c b/hw/kvmvapic.c index 1b5f416a78..9265baf568 100644 --- a/hw/kvmvapic.c +++ b/hw/kvmvapic.c @@ -382,8 +382,10 @@ static void patch_call(VAPICROMState *s, CPUX86State *env, target_ulong ip, cpu_memory_rw_debug(env, ip + 1, (void *)&offset, sizeof(offset), 1); } -static void patch_instruction(VAPICROMState *s, CPUX86State *env, target_ulong ip) +static void patch_instruction(VAPICROMState *s, X86CPU *cpu, target_ulong ip) { + CPUState *cs = CPU(cpu); + CPUX86State *env = &cpu->env; VAPICHandlers *handlers; uint8_t opcode[2]; uint32_t imm32; @@ -439,17 +441,18 @@ static void patch_instruction(VAPICROMState *s, CPUX86State *env, target_ulong i resume_all_vcpus(); if (!kvm_enabled()) { - env->current_tb = NULL; + cs->current_tb = NULL; tb_gen_code(env, current_pc, current_cs_base, current_flags, 1); cpu_resume_from_signal(env, NULL); } } -void vapic_report_tpr_access(DeviceState *dev, void *cpu, target_ulong ip, +void vapic_report_tpr_access(DeviceState *dev, CPUState *cs, target_ulong ip, TPRAccess access) { VAPICROMState *s = DO_UPCAST(VAPICROMState, busdev.qdev, dev); - CPUX86State *env = cpu; + X86CPU *cpu = X86_CPU(cs); + CPUX86State *env = &cpu->env; cpu_synchronize_state(env); @@ -465,7 +468,7 @@ void vapic_report_tpr_access(DeviceState *dev, void *cpu, target_ulong ip, if (vapic_enable(s, env) < 0) { return; } - patch_instruction(s, env, ip); + patch_instruction(s, cpu, ip); } typedef struct VAPICEnableTPRReporting { diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h index ca39f05567..ae64590cdf 100644 --- a/include/exec/cpu-defs.h +++ b/include/exec/cpu-defs.h @@ -148,7 +148,6 @@ typedef struct CPUWatchpoint { #define CPU_TEMP_BUF_NLONGS 128 #define CPU_COMMON \ - struct TranslationBlock *current_tb; /* currently executing TB */ \ /* soft mmu support */ \ /* in order to avoid passing too many arguments to the MMIO \ helpers, we store some rarely used information in the CPU \ diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index f685c28573..e856191e40 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -404,11 +404,13 @@ extern volatile sig_atomic_t exit_request; instruction of a TB so that interrupts take effect immediately. */ static inline int can_do_io(CPUArchState *env) { + CPUState *cpu = ENV_GET_CPU(env); + if (!use_icount) { return 1; } /* If not executing code then assume we are ok. */ - if (!env->current_tb) { + if (cpu->current_tb == NULL) { return 1; } return env->can_do_io != 0; diff --git a/include/qom/cpu.h b/include/qom/cpu.h index 42f3f34bbd..c25a997808 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -71,6 +71,7 @@ struct kvm_run; * @created: Indicates whether the CPU thread has been successfully created. * @stop: Indicates a pending stop request. * @stopped: Indicates the CPU has been artificially stopped. + * @current_tb: Currently executing TB. * @kvm_fd: vCPU file descriptor for KVM. * * State of one CPU core or thread. @@ -99,6 +100,8 @@ struct CPUState { bool stopped; volatile sig_atomic_t exit_request; + struct TranslationBlock *current_tb; + int kvm_fd; bool kvm_vcpu_dirty; struct KVMState *kvm_state; diff --git a/qom/cpu.c b/qom/cpu.c index 7d8c675dd0..0a2194d413 100644 --- a/qom/cpu.c +++ b/qom/cpu.c @@ -33,6 +33,7 @@ void cpu_reset(CPUState *cpu) static void cpu_common_reset(CPUState *cpu) { cpu->exit_request = 0; + cpu->current_tb = NULL; } ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model) diff --git a/translate-all.c b/translate-all.c index efeb247add..52128aa0c4 100644 --- a/translate-all.c +++ b/translate-all.c @@ -998,6 +998,7 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end, { TranslationBlock *tb, *tb_next, *saved_tb; CPUArchState *env = cpu_single_env; + CPUState *cpu = NULL; tb_page_addr_t tb_start, tb_end; PageDesc *p; int n; @@ -1020,6 +1021,9 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end, /* build code bitmap */ build_page_bitmap(p); } + if (env != NULL) { + cpu = ENV_GET_CPU(env); + } /* we remove all the TBs in the range [start, end[ */ /* XXX: see if in some cases it could be faster to invalidate all @@ -1066,14 +1070,14 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end, /* we need to do that to handle the case where a signal occurs while doing tb_phys_invalidate() */ saved_tb = NULL; - if (env) { - saved_tb = env->current_tb; - env->current_tb = NULL; + if (cpu != NULL) { + saved_tb = cpu->current_tb; + cpu->current_tb = NULL; } tb_phys_invalidate(tb, -1); - if (env) { - env->current_tb = saved_tb; - if (env->interrupt_request && env->current_tb) { + if (cpu != NULL) { + cpu->current_tb = saved_tb; + if (env && env->interrupt_request && cpu->current_tb) { cpu_interrupt(env, env->interrupt_request); } } @@ -1094,7 +1098,7 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end, /* we generate a block containing just the instruction modifying the memory. It will ensure that it cannot modify itself */ - env->current_tb = NULL; + cpu->current_tb = NULL; tb_gen_code(env, current_pc, current_cs_base, current_flags, 1); cpu_resume_from_signal(env, NULL); } @@ -1142,6 +1146,7 @@ static void tb_invalidate_phys_page(tb_page_addr_t addr, #ifdef TARGET_HAS_PRECISE_SMC TranslationBlock *current_tb = NULL; CPUArchState *env = cpu_single_env; + CPUState *cpu = NULL; int current_tb_modified = 0; target_ulong current_pc = 0; target_ulong current_cs_base = 0; @@ -1158,6 +1163,9 @@ static void tb_invalidate_phys_page(tb_page_addr_t addr, if (tb && pc != 0) { current_tb = tb_find_pc(pc); } + if (env != NULL) { + cpu = ENV_GET_CPU(env); + } #endif while (tb != NULL) { n = (uintptr_t)tb & 3; @@ -1186,7 +1194,7 @@ static void tb_invalidate_phys_page(tb_page_addr_t addr, /* we generate a block containing just the instruction modifying the memory. It will ensure that it cannot modify itself */ - env->current_tb = NULL; + cpu->current_tb = NULL; tb_gen_code(env, current_pc, current_cs_base, current_flags, 1); cpu_resume_from_signal(env, puc); } @@ -1414,15 +1422,16 @@ void cpu_unlink_tb(CPUArchState *env) problem and hope the cpu will stop of its own accord. For userspace emulation this often isn't actually as bad as it sounds. Often signals are used primarily to interrupt blocking syscalls. */ + CPUState *cpu = ENV_GET_CPU(env); TranslationBlock *tb; static spinlock_t interrupt_lock = SPIN_LOCK_UNLOCKED; spin_lock(&interrupt_lock); - tb = env->current_tb; + tb = cpu->current_tb; /* if the cpu is currently executing code, we must unlink it and all the potentially executing TB */ if (tb) { - env->current_tb = NULL; + cpu->current_tb = NULL; tb_reset_jump_recursive(tb); } spin_unlock(&interrupt_lock); -- cgit v1.2.3-55-g7522 From c05efcb18ee30cdf2b00b3512aa0f5233b52911f Mon Sep 17 00:00:00 2001 From: Andreas Färber Date: Thu, 17 Jan 2013 12:13:41 +0100 Subject: cpu: Add CPUArchState pointer to CPUState The target-specific ENV_GET_CPU() macros have allowed us to navigate from CPUArchState to CPUState. The reverse direction was not supported. Avoid introducing CPU_GET_ENV() macros by initializing an untyped pointer that is initialized in derived instance_init functions. The field may not be called "env" due to it being poisoned. Acked-by: Richard Henderson Signed-off-by: Andreas Färber --- include/qom/cpu.h | 2 ++ target-alpha/cpu.c | 2 ++ target-arm/cpu.c | 2 ++ target-cris/cpu.c | 2 ++ target-i386/cpu.c | 1 + target-lm32/cpu.c | 2 ++ target-m68k/cpu.c | 2 ++ target-microblaze/cpu.c | 2 ++ target-mips/cpu.c | 2 ++ target-openrisc/cpu.c | 2 ++ target-ppc/translate_init.c | 2 ++ target-s390x/cpu.c | 2 ++ target-sh4/cpu.c | 2 ++ target-sparc/cpu.c | 2 ++ target-unicore32/cpu.c | 2 ++ target-xtensa/cpu.c | 2 ++ 16 files changed, 31 insertions(+) (limited to 'include') diff --git a/include/qom/cpu.h b/include/qom/cpu.h index c25a997808..ee1a7c878a 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -71,6 +71,7 @@ struct kvm_run; * @created: Indicates whether the CPU thread has been successfully created. * @stop: Indicates a pending stop request. * @stopped: Indicates the CPU has been artificially stopped. + * @env_ptr: Pointer to subclass-specific CPUArchState field. * @current_tb: Currently executing TB. * @kvm_fd: vCPU file descriptor for KVM. * @@ -100,6 +101,7 @@ struct CPUState { bool stopped; volatile sig_atomic_t exit_request; + void *env_ptr; /* CPUArchState */ struct TranslationBlock *current_tb; int kvm_fd; diff --git a/target-alpha/cpu.c b/target-alpha/cpu.c index 0cdae6986f..cec9989925 100644 --- a/target-alpha/cpu.c +++ b/target-alpha/cpu.c @@ -233,9 +233,11 @@ static const TypeInfo ev68_cpu_type_info = { static void alpha_cpu_initfn(Object *obj) { + CPUState *cs = CPU(obj); AlphaCPU *cpu = ALPHA_CPU(obj); CPUAlphaState *env = &cpu->env; + cs->env_ptr = env; cpu_exec_init(env); tlb_flush(env, 1); diff --git a/target-arm/cpu.c b/target-arm/cpu.c index f54d20057d..5dfcb740d9 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -134,9 +134,11 @@ static inline void set_feature(CPUARMState *env, int feature) static void arm_cpu_initfn(Object *obj) { + CPUState *cs = CPU(obj); ARMCPU *cpu = ARM_CPU(obj); static bool inited; + cs->env_ptr = &cpu->env; cpu_exec_init(&cpu->env); cpu->cp_regs = g_hash_table_new_full(g_int_hash, g_int_equal, g_free, g_free); diff --git a/target-cris/cpu.c b/target-cris/cpu.c index 80089884e9..7974be33f2 100644 --- a/target-cris/cpu.c +++ b/target-cris/cpu.c @@ -146,11 +146,13 @@ static void cris_cpu_realizefn(DeviceState *dev, Error **errp) static void cris_cpu_initfn(Object *obj) { + CPUState *cs = CPU(obj); CRISCPU *cpu = CRIS_CPU(obj); CRISCPUClass *ccc = CRIS_CPU_GET_CLASS(obj); CPUCRISState *env = &cpu->env; static bool tcg_initialized; + cs->env_ptr = env; cpu_exec_init(env); env->pregs[PR_VR] = ccc->vr; diff --git a/target-i386/cpu.c b/target-i386/cpu.c index e2fd6268ef..635f33407e 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -2164,6 +2164,7 @@ static void x86_cpu_initfn(Object *obj) CPUX86State *env = &cpu->env; static int inited; + cs->env_ptr = env; cpu_exec_init(env); object_property_add(obj, "family", "int", diff --git a/target-lm32/cpu.c b/target-lm32/cpu.c index 5f167340e4..a2badb5701 100644 --- a/target-lm32/cpu.c +++ b/target-lm32/cpu.c @@ -56,10 +56,12 @@ static void lm32_cpu_realizefn(DeviceState *dev, Error **errp) static void lm32_cpu_initfn(Object *obj) { + CPUState *cs = CPU(obj); LM32CPU *cpu = LM32_CPU(obj); CPULM32State *env = &cpu->env; static bool tcg_initialized; + cs->env_ptr = env; cpu_exec_init(env); env->flags = 0; diff --git a/target-m68k/cpu.c b/target-m68k/cpu.c index 42735dbe40..f5a109854b 100644 --- a/target-m68k/cpu.c +++ b/target-m68k/cpu.c @@ -154,10 +154,12 @@ static void m68k_cpu_realizefn(DeviceState *dev, Error **errp) static void m68k_cpu_initfn(Object *obj) { + CPUState *cs = CPU(obj); M68kCPU *cpu = M68K_CPU(obj); CPUM68KState *env = &cpu->env; static bool inited; + cs->env_ptr = env; cpu_exec_init(env); if (tcg_enabled() && !inited) { diff --git a/target-microblaze/cpu.c b/target-microblaze/cpu.c index 28b5a88789..81359db168 100644 --- a/target-microblaze/cpu.c +++ b/target-microblaze/cpu.c @@ -98,10 +98,12 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp) static void mb_cpu_initfn(Object *obj) { + CPUState *cs = CPU(obj); MicroBlazeCPU *cpu = MICROBLAZE_CPU(obj); CPUMBState *env = &cpu->env; static bool tcg_initialized; + cs->env_ptr = env; cpu_exec_init(env); set_float_rounding_mode(float_round_nearest_even, &env->fp_status); diff --git a/target-mips/cpu.c b/target-mips/cpu.c index 09d61723c5..4d62031c36 100644 --- a/target-mips/cpu.c +++ b/target-mips/cpu.c @@ -55,9 +55,11 @@ static void mips_cpu_realizefn(DeviceState *dev, Error **errp) static void mips_cpu_initfn(Object *obj) { + CPUState *cs = CPU(obj); MIPSCPU *cpu = MIPS_CPU(obj); CPUMIPSState *env = &cpu->env; + cs->env_ptr = env; cpu_exec_init(env); if (tcg_enabled()) { diff --git a/target-openrisc/cpu.c b/target-openrisc/cpu.c index d8cc533efe..72d5e8d2a5 100644 --- a/target-openrisc/cpu.c +++ b/target-openrisc/cpu.c @@ -75,9 +75,11 @@ static void openrisc_cpu_realizefn(DeviceState *dev, Error **errp) static void openrisc_cpu_initfn(Object *obj) { + CPUState *cs = CPU(obj); OpenRISCCPU *cpu = OPENRISC_CPU(obj); static int inited; + cs->env_ptr = &cpu->env; cpu_exec_init(&cpu->env); #ifndef CONFIG_USER_ONLY diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 5a2acaafe8..5df205757b 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -10529,11 +10529,13 @@ static void ppc_cpu_reset(CPUState *s) static void ppc_cpu_initfn(Object *obj) { + CPUState *cs = CPU(obj); PowerPCCPU *cpu = POWERPC_CPU(obj); PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); CPUPPCState *env = &cpu->env; ppc_def_t *def = pcc->info; + cs->env_ptr = env; cpu_exec_init(env); env->msr_mask = def->msr_mask; diff --git a/target-s390x/cpu.c b/target-s390x/cpu.c index 787c937579..b74654724d 100644 --- a/target-s390x/cpu.c +++ b/target-s390x/cpu.c @@ -110,6 +110,7 @@ static void s390_cpu_realizefn(DeviceState *dev, Error **errp) static void s390_cpu_initfn(Object *obj) { + CPUState *cs = CPU(obj); S390CPU *cpu = S390_CPU(obj); CPUS390XState *env = &cpu->env; static bool inited; @@ -118,6 +119,7 @@ static void s390_cpu_initfn(Object *obj) struct tm tm; #endif + cs->env_ptr = env; cpu_exec_init(env); #if !defined(CONFIG_USER_ONLY) qemu_register_reset(s390_cpu_machine_reset_cb, cpu); diff --git a/target-sh4/cpu.c b/target-sh4/cpu.c index dc5d7568ea..ef0e62195d 100644 --- a/target-sh4/cpu.c +++ b/target-sh4/cpu.c @@ -67,9 +67,11 @@ static void superh_cpu_realizefn(DeviceState *dev, Error **errp) static void superh_cpu_initfn(Object *obj) { + CPUState *cs = CPU(obj); SuperHCPU *cpu = SUPERH_CPU(obj); CPUSH4State *env = &cpu->env; + cs->env_ptr = env; cpu_exec_init(env); env->movcal_backup_tail = &(env->movcal_backup); diff --git a/target-sparc/cpu.c b/target-sparc/cpu.c index 759be532a3..ef52df6d74 100644 --- a/target-sparc/cpu.c +++ b/target-sparc/cpu.c @@ -860,9 +860,11 @@ static void sparc_cpu_realizefn(DeviceState *dev, Error **errp) static void sparc_cpu_initfn(Object *obj) { + CPUState *cs = CPU(obj); SPARCCPU *cpu = SPARC_CPU(obj); CPUSPARCState *env = &cpu->env; + cs->env_ptr = env; cpu_exec_init(env); if (tcg_enabled()) { diff --git a/target-unicore32/cpu.c b/target-unicore32/cpu.c index 7bcf3b3658..b7024c85bb 100644 --- a/target-unicore32/cpu.c +++ b/target-unicore32/cpu.c @@ -93,10 +93,12 @@ static void uc32_cpu_realizefn(DeviceState *dev, Error **errp) static void uc32_cpu_initfn(Object *obj) { + CPUState *cs = CPU(obj); UniCore32CPU *cpu = UNICORE32_CPU(obj); CPUUniCore32State *env = &cpu->env; static bool inited; + cs->env_ptr = env; cpu_exec_init(env); #ifdef CONFIG_USER_ONLY diff --git a/target-xtensa/cpu.c b/target-xtensa/cpu.c index 309bb169ec..785e56d367 100644 --- a/target-xtensa/cpu.c +++ b/target-xtensa/cpu.c @@ -69,10 +69,12 @@ static void xtensa_cpu_realizefn(DeviceState *dev, Error **errp) static void xtensa_cpu_initfn(Object *obj) { + CPUState *cs = CPU(obj); XtensaCPU *cpu = XTENSA_CPU(obj); CPUXtensaState *env = &cpu->env; static bool tcg_inited; + cs->env_ptr = env; cpu_exec_init(env); if (tcg_enabled() && !tcg_inited) { -- cgit v1.2.3-55-g7522