From 651cd8b7e18eda46a36cf073428452d04bb354f2 Mon Sep 17 00:00:00 2001 From: Alistair Francis Date: Thu, 3 May 2018 16:54:02 -0700 Subject: hw/riscv/sifive_e: Create a SiFive E SoC object Signed-off-by: Alistair Francis Reviewed-by: Michael Clark --- include/hw/riscv/sifive_e.h | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/hw/riscv/sifive_e.h b/include/hw/riscv/sifive_e.h index 12ad6d2ebb..7b6d8aed96 100644 --- a/include/hw/riscv/sifive_e.h +++ b/include/hw/riscv/sifive_e.h @@ -19,13 +19,25 @@ #ifndef HW_SIFIVE_E_H #define HW_SIFIVE_E_H -typedef struct SiFiveEState { +#define TYPE_RISCV_E_SOC "riscv.sifive.e.soc" +#define RISCV_E_SOC(obj) \ + OBJECT_CHECK(SiFiveESoCState, (obj), TYPE_RISCV_E_SOC) + +typedef struct SiFiveESoCState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ - RISCVHartArrayState soc; + RISCVHartArrayState cpus; DeviceState *plic; +} SiFiveESoCState; + +typedef struct SiFiveEState { + /*< private >*/ + SysBusDevice parent_obj; + + /*< public >*/ + SiFiveESoCState soc; } SiFiveEState; enum { -- cgit v1.2.3-55-g7522