From aa04c9d20704fa5b9ab239d5111adbcce5f49808 Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Mon, 9 Oct 2017 21:50:49 +0200 Subject: qom: introduce type_register_static_array() it will help to remove code duplication of registration static types in places that have open coded loop to perform batch type registering. Signed-off-by: Igor Mammedov Reviewed-by: Eduardo Habkost Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: David Gibson Signed-off-by: David Gibson --- include/qom/object.h | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'include') diff --git a/include/qom/object.h b/include/qom/object.h index a707b67781..9a2369c67b 100644 --- a/include/qom/object.h +++ b/include/qom/object.h @@ -788,6 +788,16 @@ Type type_register_static(const TypeInfo *info); */ Type type_register(const TypeInfo *info); +/** + * type_register_static_array: + * @infos: The array of the new type #TypeInfo structures. + * @nr_infos: number of entries in @infos + * + * @infos and all of the strings it points to should exist for the life time + * that the type is registered. + */ +void type_register_static_array(const TypeInfo *infos, int nr_infos); + /** * object_class_dynamic_cast_assert: * @klass: The #ObjectClass to attempt to cast. -- cgit v1.2.3-55-g7522 From 38b5d79b2e8cf6085324066d84e8bb3b3bbe8548 Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Mon, 9 Oct 2017 21:50:50 +0200 Subject: qom: add helper macro DEFINE_TYPES() DEFINE_TYPES() will help to simplify following routine patterns: static void foo_register_types(void) { type_register_static(&foo1_type_info); type_register_static(&foo2_type_info); ... } type_init(foo_register_types) or static void foo_register_types(void) { int i; for (i = 0; i < ARRAY_SIZE(type_infos); i++) { type_register_static(&type_infos[i]); } } type_init(foo_register_types) with a single line DEFINE_TYPES(type_infos) where types have static definition which could be consolidated in a single array of TypeInfo structures. It saves us ~6-10LOC per use case and would help to replace imperative foo_register_types() there with declarative style of type registration. Signed-off-by: Igor Mammedov Reviewed-by: Eduardo Habkost Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: David Gibson Signed-off-by: David Gibson --- include/qom/object.h | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) (limited to 'include') diff --git a/include/qom/object.h b/include/qom/object.h index 9a2369c67b..dc73d59660 100644 --- a/include/qom/object.h +++ b/include/qom/object.h @@ -79,6 +79,28 @@ typedef struct InterfaceInfo InterfaceInfo; * #TypeInfo describes information about the type including what it inherits * from, the instance and class size, and constructor/destructor hooks. * + * Alternatively several static types could be registered using helper macro + * DEFINE_TYPES() + * + * + * + * static const TypeInfo device_types_info[] = { + * { + * .name = TYPE_MY_DEVICE_A, + * .parent = TYPE_DEVICE, + * .instance_size = sizeof(MyDeviceA), + * }, + * { + * .name = TYPE_MY_DEVICE_B, + * .parent = TYPE_DEVICE, + * .instance_size = sizeof(MyDeviceB), + * }, + * }; + * + * DEFINE_TYPES(device_types_info) + * + * + * * Every type has an #ObjectClass associated with it. #ObjectClass derivatives * are instantiated dynamically but there is only ever one instance for any * given type. The #ObjectClass typically holds a table of function pointers @@ -798,6 +820,20 @@ Type type_register(const TypeInfo *info); */ void type_register_static_array(const TypeInfo *infos, int nr_infos); +/** + * DEFINE_TYPES: + * @type_array: The array containing #TypeInfo structures to register + * + * @type_array should be static constant that exists for the life time + * that the type is registered. + */ +#define DEFINE_TYPES(type_array) \ +static void do_qemu_init_ ## type_array(void) \ +{ \ + type_register_static_array(type_array, ARRAY_SIZE(type_array)); \ +} \ +type_init(do_qemu_init_ ## type_array) + /** * object_class_dynamic_cast_assert: * @klass: The #ObjectClass to attempt to cast. -- cgit v1.2.3-55-g7522 From a1063aa8a5e7bb66f7d2ea1da335d856df0b6f23 Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Mon, 9 Oct 2017 21:50:58 +0200 Subject: ppc: spapr: replace ppc_cpu_parse_features() with cpu_parse_cpu_model() ppc_cpu_parse_features() is doing practically the same thing as generic cpu_parse_cpu_model(). So remove duplicated impl. and reuse generic one. Signed-off-by: Igor Mammedov Reviewed-by: Greg Kurz Acked-by: David Gibson Signed-off-by: David Gibson --- hw/ppc/ppc.c | 25 ------------------------- hw/ppc/spapr_cpu_core.c | 9 ++++----- include/hw/ppc/ppc.h | 2 -- 3 files changed, 4 insertions(+), 32 deletions(-) (limited to 'include') diff --git a/hw/ppc/ppc.c b/hw/ppc/ppc.c index 05da316e0b..7ec35de5ae 100644 --- a/hw/ppc/ppc.c +++ b/hw/ppc/ppc.c @@ -1359,28 +1359,3 @@ void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val) break; } } - -void ppc_cpu_parse_features(const char *cpu_model) -{ - CPUClass *cc; - ObjectClass *oc; - const char *typename; - gchar **model_pieces; - - model_pieces = g_strsplit(cpu_model, ",", 2); - if (!model_pieces[0]) { - error_report("Invalid/empty CPU model name"); - exit(1); - } - - oc = cpu_class_by_name(TYPE_POWERPC_CPU, model_pieces[0]); - if (oc == NULL) { - error_report("Unable to find CPU definition: %s", model_pieces[0]); - exit(1); - } - - typename = object_class_get_name(oc); - cc = CPU_CLASS(oc); - cc->parse_features(typename, model_pieces[1], &error_fatal); - g_strfreev(model_pieces); -} diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index 37beb56e8b..79a9615080 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -34,6 +34,7 @@ void spapr_cpu_parse_features(sPAPRMachineState *spapr) * before passing it on to the cpu level parser. */ gchar **inpieces; + gchar *newprops; int i, j; gchar *compat_str = NULL; @@ -58,17 +59,15 @@ void spapr_cpu_parse_features(sPAPRMachineState *spapr) if (compat_str) { char *val = compat_str + strlen("compat="); - gchar *newprops = g_strjoinv(",", inpieces); object_property_set_str(OBJECT(spapr), val, "max-cpu-compat", &error_fatal); - ppc_cpu_parse_features(newprops); - g_free(newprops); - } else { - ppc_cpu_parse_features(MACHINE(spapr)->cpu_model); } + newprops = g_strjoinv(",", inpieces); + cpu_parse_cpu_model(TYPE_POWERPC_CPU, newprops); + g_free(newprops); g_strfreev(inpieces); } diff --git a/include/hw/ppc/ppc.h b/include/hw/ppc/ppc.h index 4e7fe110d6..ff0ac306be 100644 --- a/include/hw/ppc/ppc.h +++ b/include/hw/ppc/ppc.h @@ -105,6 +105,4 @@ enum { /* ppc_booke.c */ void ppc_booke_timers_init(PowerPCCPU *cpu, uint32_t freq, uint32_t flags); - -void ppc_cpu_parse_features(const char *cpu_model); #endif -- cgit v1.2.3-55-g7522 From b8e999673bd479eed7e71a5e8bc468bca4e31d7d Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Mon, 9 Oct 2017 21:50:59 +0200 Subject: ppc: move '-cpu foo,compat=xxx' parsing into ppc_cpu_parse_featurestr() there is a dedicated callback CPUClass::parse_features which purpose is to convert -cpu features into a set of global properties AND deal with compat/legacy features that couldn't be directly translated into CPU's properties. Create ppc variant of it (ppc_cpu_parse_featurestr) and move 'compat=val' handling from spapr_cpu_core.c into it. That removes a dependency of board/core code on cpu_model parsing and would let to reuse common -cpu parsing introduced by 6063d4c0 Set "max-cpu-compat" property only if it exists, in practice it should limit 'compat' hack to spapr machine and allow to avoid including machine/spapr headers in target/ppc/cpu.c Signed-off-by: Igor Mammedov Signed-off-by: David Gibson --- hw/ppc/spapr.c | 2 +- hw/ppc/spapr_cpu_core.c | 50 --------------------------------------- include/hw/ppc/spapr.h | 1 - target/ppc/cpu-qom.h | 1 + target/ppc/translate_init.c | 57 +++++++++++++++++++++++++++++++++++++++++++++ 5 files changed, 59 insertions(+), 52 deletions(-) (limited to 'include') diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 147fd2cfd3..112dd91348 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -2373,7 +2373,7 @@ static void ppc_spapr_init(MachineState *machine) machine->cpu_model = kvm_enabled() ? "host" : smc->tcg_default_cpu; } - spapr_cpu_parse_features(spapr); + cpu_parse_cpu_model(TYPE_POWERPC_CPU, machine->cpu_model); spapr_set_vsmt_mode(spapr, &error_fatal); diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index 79a9615080..b6610dd431 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -21,56 +21,6 @@ #include "sysemu/hw_accel.h" #include "qemu/error-report.h" -void spapr_cpu_parse_features(sPAPRMachineState *spapr) -{ - /* - * Backwards compatibility hack: - * - * CPUs had a "compat=" property which didn't make sense for - * anything except pseries. It was replaced by "max-cpu-compat" - * machine option. This supports old command lines like - * -cpu POWER8,compat=power7 - * By stripping the compat option and applying it to the machine - * before passing it on to the cpu level parser. - */ - gchar **inpieces; - gchar *newprops; - int i, j; - gchar *compat_str = NULL; - - inpieces = g_strsplit(MACHINE(spapr)->cpu_model, ",", 0); - - /* inpieces[0] is the actual model string */ - i = 1; - j = 1; - while (inpieces[i]) { - if (g_str_has_prefix(inpieces[i], "compat=")) { - /* in case of multiple compat= options */ - g_free(compat_str); - compat_str = inpieces[i]; - } else { - j++; - } - - i++; - /* Excise compat options from list */ - inpieces[j] = inpieces[i]; - } - - if (compat_str) { - char *val = compat_str + strlen("compat="); - - object_property_set_str(OBJECT(spapr), val, "max-cpu-compat", - &error_fatal); - - } - - newprops = g_strjoinv(",", inpieces); - cpu_parse_cpu_model(TYPE_POWERPC_CPU, newprops); - g_free(newprops); - g_strfreev(inpieces); -} - static void spapr_cpu_reset(void *opaque) { PowerPCCPU *cpu = opaque; diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index c1b365f564..8ca4f9498f 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -659,7 +659,6 @@ void spapr_hotplug_req_add_by_count_indexed(sPAPRDRConnectorType drc_type, uint32_t count, uint32_t index); void spapr_hotplug_req_remove_by_count_indexed(sPAPRDRConnectorType drc_type, uint32_t count, uint32_t index); -void spapr_cpu_parse_features(sPAPRMachineState *spapr); int spapr_hpt_shift_for_ramsize(uint64_t ramsize); void spapr_reallocate_hpt(sPAPRMachineState *spapr, int shift, Error **errp); diff --git a/target/ppc/cpu-qom.h b/target/ppc/cpu-qom.h index d0cf6ca2a9..429b47f959 100644 --- a/target/ppc/cpu-qom.h +++ b/target/ppc/cpu-qom.h @@ -181,6 +181,7 @@ typedef struct PowerPCCPUClass { DeviceRealize parent_realize; DeviceUnrealize parent_unrealize; void (*parent_reset)(CPUState *cpu); + void (*parent_parse_features)(const char *type, char *str, Error **errp); uint32_t pvr; bool (*pvr_match)(struct PowerPCCPUClass *pcc, uint32_t pvr); diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c index 0d6379fcc5..3d16481ca1 100644 --- a/target/ppc/translate_init.c +++ b/target/ppc/translate_init.c @@ -10097,6 +10097,61 @@ static ObjectClass *ppc_cpu_class_by_name(const char *name) return NULL; } +static void ppc_cpu_parse_featurestr(const char *type, char *features, + Error **errp) +{ + Object *machine = qdev_get_machine(); + const PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(object_class_by_name(type)); + + if (!features) { + return; + } + + if (object_property_find(machine, "max-cpu-compat", NULL)) { + int i; + char **inpieces; + char *s = features; + Error *local_err = NULL; + char *compat_str = NULL; + + /* + * Backwards compatibility hack: + * + * CPUs had a "compat=" property which didn't make sense for + * anything except pseries. It was replaced by "max-cpu-compat" + * machine option. This supports old command lines like + * -cpu POWER8,compat=power7 + * By stripping the compat option and applying it to the machine + * before passing it on to the cpu level parser. + */ + inpieces = g_strsplit(features, ",", 0); + *s = '\0'; + for (i = 0; inpieces[i]; i++) { + if (g_str_has_prefix(inpieces[i], "compat=")) { + compat_str = inpieces[i]; + continue; + } + if ((i != 0) && (s != features)) { + s = g_stpcpy(s, ","); + } + s = g_stpcpy(s, inpieces[i]); + } + + if (compat_str) { + char *v = compat_str + strlen("compat="); + object_property_set_str(machine, v, "max-cpu-compat", &local_err); + } + g_strfreev(inpieces); + if (local_err) { + error_propagate(errp, local_err); + return; + } + } + + /* do property processing with generic handler */ + pcc->parent_parse_features(type, features, errp); +} + const char *ppc_cpu_lookup_alias(const char *alias) { int ai; @@ -10489,6 +10544,8 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data) cc->reset = ppc_cpu_reset; cc->class_by_name = ppc_cpu_class_by_name; + pcc->parent_parse_features = cc->parse_features; + cc->parse_features = ppc_cpu_parse_featurestr; cc->has_work = ppc_cpu_has_work; cc->do_interrupt = ppc_cpu_do_interrupt; cc->cpu_exec_interrupt = ppc_cpu_exec_interrupt; -- cgit v1.2.3-55-g7522 From 44cd95e31a94ef39c8888ad9e8f5fec66dae31bb Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Mon, 9 Oct 2017 21:51:00 +0200 Subject: ppc: spapr: define core types statically spapr core type definition doesn't have any fields that require it to be defined at runtime. So replace code that fills in TypeInfo at runtime with static TypeInfo array that does the same at complie time. Signed-off-by: Igor Mammedov Reviewed-by: Greg Kurz Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: David Gibson --- hw/ppc/spapr_cpu_core.c | 87 +++++++++++++---------------------------- include/hw/ppc/spapr_cpu_core.h | 2 + 2 files changed, 30 insertions(+), 59 deletions(-) (limited to 'include') diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index b6610dd431..550d320b5b 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -217,37 +217,6 @@ err: error_propagate(errp, local_err); } -static const char *spapr_core_models[] = { - /* 970 */ - "970_v2.2", - - /* 970MP variants */ - "970mp_v1.0", - "970mp_v1.1", - - /* POWER5+ */ - "power5+_v2.1", - - /* POWER7 */ - "power7_v2.3", - - /* POWER7+ */ - "power7+_v2.1", - - /* POWER8 */ - "power8_v2.0", - - /* POWER8E */ - "power8e_v2.1", - - /* POWER8NVL */ - "power8nvl_v1.0", - - /* POWER9 */ - "power9_v1.0", - "power9_v2.0", -}; - static Property spapr_cpu_core_properties[] = { DEFINE_PROP_INT32("node-id", sPAPRCPUCore, node_id, CPU_UNSET_NUMA_NODE_ID), DEFINE_PROP_END_OF_LIST() @@ -265,33 +234,33 @@ void spapr_cpu_core_class_init(ObjectClass *oc, void *data) g_assert(scc->cpu_class); } -static const TypeInfo spapr_cpu_core_type_info = { - .name = TYPE_SPAPR_CPU_CORE, - .parent = TYPE_CPU_CORE, - .abstract = true, - .instance_size = sizeof(sPAPRCPUCore), - .class_size = sizeof(sPAPRCPUCoreClass), -}; - -static void spapr_cpu_core_register_types(void) -{ - int i; - - type_register_static(&spapr_cpu_core_type_info); - - for (i = 0; i < ARRAY_SIZE(spapr_core_models); i++) { - TypeInfo type_info = { - .parent = TYPE_SPAPR_CPU_CORE, - .instance_size = sizeof(sPAPRCPUCore), - .class_init = spapr_cpu_core_class_init, - .class_data = (void *) spapr_core_models[i], - }; - - type_info.name = g_strdup_printf("%s-" TYPE_SPAPR_CPU_CORE, - spapr_core_models[i]); - type_register(&type_info); - g_free((void *)type_info.name); +#define DEFINE_SPAPR_CPU_CORE_TYPE(cpu_model) \ + { \ + .parent = TYPE_SPAPR_CPU_CORE, \ + .class_data = (void *) cpu_model, \ + .class_init = spapr_cpu_core_class_init, \ + .name = SPAPR_CPU_CORE_TYPE_NAME(cpu_model), \ } -} -type_init(spapr_cpu_core_register_types) +static const TypeInfo spapr_cpu_core_type_infos[] = { + { + .name = TYPE_SPAPR_CPU_CORE, + .parent = TYPE_CPU_CORE, + .abstract = true, + .instance_size = sizeof(sPAPRCPUCore), + .class_size = sizeof(sPAPRCPUCoreClass), + }, + DEFINE_SPAPR_CPU_CORE_TYPE("970_v2.2"), + DEFINE_SPAPR_CPU_CORE_TYPE("970mp_v1.0"), + DEFINE_SPAPR_CPU_CORE_TYPE("970mp_v1.1"), + DEFINE_SPAPR_CPU_CORE_TYPE("power5+_v2.1"), + DEFINE_SPAPR_CPU_CORE_TYPE("power7_v2.3"), + DEFINE_SPAPR_CPU_CORE_TYPE("power7+_v2.1"), + DEFINE_SPAPR_CPU_CORE_TYPE("power8_v2.0"), + DEFINE_SPAPR_CPU_CORE_TYPE("power8e_v2.1"), + DEFINE_SPAPR_CPU_CORE_TYPE("power8nvl_v1.0"), + DEFINE_SPAPR_CPU_CORE_TYPE("power9_v1.0"), + DEFINE_SPAPR_CPU_CORE_TYPE("power9_v2.0"), +}; + +DEFINE_TYPES(spapr_cpu_core_type_infos) diff --git a/include/hw/ppc/spapr_cpu_core.h b/include/hw/ppc/spapr_cpu_core.h index 93051e9ecf..66dcf52587 100644 --- a/include/hw/ppc/spapr_cpu_core.h +++ b/include/hw/ppc/spapr_cpu_core.h @@ -21,6 +21,8 @@ #define SPAPR_CPU_CORE_GET_CLASS(obj) \ OBJECT_GET_CLASS(sPAPRCPUCoreClass, (obj), TYPE_SPAPR_CPU_CORE) +#define SPAPR_CPU_CORE_TYPE_NAME(model) model "-" TYPE_SPAPR_CPU_CORE + typedef struct sPAPRCPUCore { /*< private >*/ CPUCore parent_obj; -- cgit v1.2.3-55-g7522 From b51d3c8818e2fd0a4a36a43d7f8756274cbc5ac9 Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Mon, 9 Oct 2017 21:51:01 +0200 Subject: ppc: spapr: use cpu type name directly replace sPAPRCPUCoreClass::cpu_class with cpu type name since it were needed just to get that at points it were accessed. Signed-off-by: Igor Mammedov Reviewed-by: Greg Kurz Acked-by: David Gibson Signed-off-by: David Gibson --- hw/ppc/spapr.c | 6 ++---- hw/ppc/spapr_cpu_core.c | 14 ++++++-------- include/hw/ppc/spapr_cpu_core.h | 2 +- target/ppc/kvm.c | 2 +- 4 files changed, 10 insertions(+), 14 deletions(-) (limited to 'include') diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 112dd91348..2c32f33314 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -3161,8 +3161,7 @@ void spapr_core_release(DeviceState *dev) if (smc->pre_2_10_has_unused_icps) { sPAPRCPUCore *sc = SPAPR_CPU_CORE(OBJECT(dev)); sPAPRCPUCoreClass *scc = SPAPR_CPU_CORE_GET_CLASS(OBJECT(cc)); - const char *typename = object_class_get_name(scc->cpu_class); - size_t size = object_type_get_instance_size(typename); + size_t size = object_type_get_instance_size(scc->cpu_type); int i; for (i = 0; i < cc->nr_threads; i++) { @@ -3258,8 +3257,7 @@ static void spapr_core_plug(HotplugHandler *hotplug_dev, DeviceState *dev, if (smc->pre_2_10_has_unused_icps) { sPAPRCPUCoreClass *scc = SPAPR_CPU_CORE_GET_CLASS(OBJECT(cc)); - const char *typename = object_class_get_name(scc->cpu_class); - size_t size = object_type_get_instance_size(typename); + size_t size = object_type_get_instance_size(scc->cpu_type); int i; for (i = 0; i < cc->nr_threads; i++) { diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index 550d320b5b..9810697221 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -90,8 +90,7 @@ static void spapr_cpu_core_unrealizefn(DeviceState *dev, Error **errp) { sPAPRCPUCore *sc = SPAPR_CPU_CORE(OBJECT(dev)); sPAPRCPUCoreClass *scc = SPAPR_CPU_CORE_GET_CLASS(OBJECT(dev)); - const char *typename = object_class_get_name(scc->cpu_class); - size_t size = object_type_get_instance_size(typename); + size_t size = object_type_get_instance_size(scc->cpu_type); CPUCore *cc = CPU_CORE(dev); int i; @@ -152,8 +151,7 @@ static void spapr_cpu_core_realize(DeviceState *dev, Error **errp) sPAPRCPUCore *sc = SPAPR_CPU_CORE(OBJECT(dev)); sPAPRCPUCoreClass *scc = SPAPR_CPU_CORE_GET_CLASS(OBJECT(dev)); CPUCore *cc = CPU_CORE(OBJECT(dev)); - const char *typename = object_class_get_name(scc->cpu_class); - size_t size = object_type_get_instance_size(typename); + size_t size; Error *local_err = NULL; void *obj; int i, j; @@ -164,6 +162,7 @@ static void spapr_cpu_core_realize(DeviceState *dev, Error **errp) return; } + size = object_type_get_instance_size(scc->cpu_type); sc->threads = g_malloc0(size * cc->nr_threads); for (i = 0; i < cc->nr_threads; i++) { char id[32]; @@ -172,7 +171,7 @@ static void spapr_cpu_core_realize(DeviceState *dev, Error **errp) obj = sc->threads + i * size; - object_initialize(obj, size, typename); + object_initialize(obj, size, scc->cpu_type); cs = CPU(obj); cpu = POWERPC_CPU(cs); cs->cpu_index = cc->core_id + i; @@ -230,14 +229,13 @@ void spapr_cpu_core_class_init(ObjectClass *oc, void *data) dc->realize = spapr_cpu_core_realize; dc->unrealize = spapr_cpu_core_unrealizefn; dc->props = spapr_cpu_core_properties; - scc->cpu_class = cpu_class_by_name(TYPE_POWERPC_CPU, data); - g_assert(scc->cpu_class); + scc->cpu_type = data; } #define DEFINE_SPAPR_CPU_CORE_TYPE(cpu_model) \ { \ .parent = TYPE_SPAPR_CPU_CORE, \ - .class_data = (void *) cpu_model, \ + .class_data = (void *) POWERPC_CPU_TYPE_NAME(cpu_model), \ .class_init = spapr_cpu_core_class_init, \ .name = SPAPR_CPU_CORE_TYPE_NAME(cpu_model), \ } diff --git a/include/hw/ppc/spapr_cpu_core.h b/include/hw/ppc/spapr_cpu_core.h index 66dcf52587..264ce68785 100644 --- a/include/hw/ppc/spapr_cpu_core.h +++ b/include/hw/ppc/spapr_cpu_core.h @@ -34,7 +34,7 @@ typedef struct sPAPRCPUCore { typedef struct sPAPRCPUCoreClass { DeviceClass parent_class; - ObjectClass *cpu_class; + const char *cpu_type; } sPAPRCPUCoreClass; char *spapr_get_cpu_core_type(const char *model); diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c index 171d3d8040..c2152ed52c 100644 --- a/target/ppc/kvm.c +++ b/target/ppc/kvm.c @@ -2514,7 +2514,7 @@ static int kvm_ppc_register_host_cpu_type(void) type_info.instance_size = sizeof(sPAPRCPUCore); type_info.instance_init = NULL; type_info.class_init = spapr_cpu_core_class_init; - type_info.class_data = (void *) "host"; + type_info.class_data = (void *) POWERPC_CPU_TYPE_NAME("host"); type_register(&type_info); g_free((void *)type_info.name); #endif -- cgit v1.2.3-55-g7522 From 5bbb2641861934e1ba52151cb9eb4cfac581346c Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Mon, 9 Oct 2017 21:51:02 +0200 Subject: ppc: spapr: register 'host' core type along with the rest of core types consolidate 'host' core type registration by moving it from KVM specific code into spapr_cpu_core.c, similar like it's done in x86 target. Signed-off-by: Igor Mammedov Reviewed-by: Greg Kurz Acked-by: David Gibson Signed-off-by: David Gibson --- hw/ppc/spapr_cpu_core.c | 5 ++++- include/hw/ppc/spapr_cpu_core.h | 1 - target/ppc/kvm.c | 11 ----------- 3 files changed, 4 insertions(+), 13 deletions(-) (limited to 'include') diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index 9810697221..7dbf9c31c5 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -221,7 +221,7 @@ static Property spapr_cpu_core_properties[] = { DEFINE_PROP_END_OF_LIST() }; -void spapr_cpu_core_class_init(ObjectClass *oc, void *data) +static void spapr_cpu_core_class_init(ObjectClass *oc, void *data) { DeviceClass *dc = DEVICE_CLASS(oc); sPAPRCPUCoreClass *scc = SPAPR_CPU_CORE_CLASS(oc); @@ -259,6 +259,9 @@ static const TypeInfo spapr_cpu_core_type_infos[] = { DEFINE_SPAPR_CPU_CORE_TYPE("power8nvl_v1.0"), DEFINE_SPAPR_CPU_CORE_TYPE("power9_v1.0"), DEFINE_SPAPR_CPU_CORE_TYPE("power9_v2.0"), +#ifdef CONFIG_KVM + DEFINE_SPAPR_CPU_CORE_TYPE("host"), +#endif }; DEFINE_TYPES(spapr_cpu_core_type_infos) diff --git a/include/hw/ppc/spapr_cpu_core.h b/include/hw/ppc/spapr_cpu_core.h index 264ce68785..42765de392 100644 --- a/include/hw/ppc/spapr_cpu_core.h +++ b/include/hw/ppc/spapr_cpu_core.h @@ -38,5 +38,4 @@ typedef struct sPAPRCPUCoreClass { } sPAPRCPUCoreClass; char *spapr_get_cpu_core_type(const char *model); -void spapr_cpu_core_class_init(ObjectClass *oc, void *data); #endif diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c index c2152ed52c..cb5777afa0 100644 --- a/target/ppc/kvm.c +++ b/target/ppc/kvm.c @@ -2508,17 +2508,6 @@ static int kvm_ppc_register_host_cpu_type(void) oc = object_class_by_name(type_info.name); g_assert(oc); -#if defined(TARGET_PPC64) - type_info.name = g_strdup_printf("%s-"TYPE_SPAPR_CPU_CORE, "host"); - type_info.parent = TYPE_SPAPR_CPU_CORE, - type_info.instance_size = sizeof(sPAPRCPUCore); - type_info.instance_init = NULL; - type_info.class_init = spapr_cpu_core_class_init; - type_info.class_data = (void *) POWERPC_CPU_TYPE_NAME("host"); - type_register(&type_info); - g_free((void *)type_info.name); -#endif - /* * Update generic CPU family class alias (e.g. on a POWER8NVL host, * we want "POWER8" to be a "family" alias that points to the current -- cgit v1.2.3-55-g7522 From 2e9c10eba0206e7b9a5ed03e51269759caac27f0 Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Mon, 9 Oct 2017 21:51:05 +0200 Subject: ppc: spapr: use generic cpu_model parsing use generic cpu_model parsing introduced by (6063d4c0f vl.c: convert cpu_model to cpu type and set of global properties before machine_init()) it allows to: * replace sPAPRMachineClass::tcg_default_cpu with MachineClass::default_cpu_type * drop cpu_parse_cpu_model() from hw/ppc/spapr.c and reuse one in vl.c * simplify spapr_get_cpu_core_type() by removing not needed anymore recurrsion since alias look up happens earlier at vl.c and spapr_get_cpu_core_type() works only with resulted from that cpu type. * spapr no more needs to parse/depend on being phased out MachineState::cpu_model, all tha parsing done by generic code and target specific callback. Signed-off-by: Igor Mammedov [dwg: Correct minor compile error] Signed-off-by: David Gibson --- hw/ppc/spapr.c | 16 ++++------------ hw/ppc/spapr_cpu_core.c | 30 ++++++++++-------------------- include/hw/ppc/spapr.h | 1 - include/hw/ppc/spapr_cpu_core.h | 2 +- target/ppc/cpu.h | 1 - target/ppc/kvm.c | 11 ++++++++--- target/ppc/translate_init.c | 2 +- 7 files changed, 24 insertions(+), 39 deletions(-) (limited to 'include') diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index f7c5df3832..d682f013d4 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -2129,7 +2129,7 @@ static void spapr_init_cpus(sPAPRMachineState *spapr) { MachineState *machine = MACHINE(spapr); MachineClass *mc = MACHINE_GET_CLASS(machine); - char *type = spapr_get_cpu_core_type(machine->cpu_model); + const char *type = spapr_get_cpu_core_type(machine->cpu_type); int smt = kvmppc_smt_threads(); const CPUArchIdList *possible_cpus; int boot_cores_nr = smp_cpus / smp_threads; @@ -2184,7 +2184,6 @@ static void spapr_init_cpus(sPAPRMachineState *spapr) object_property_set_bool(core, true, "realized", &error_fatal); } } - g_free(type); } static void spapr_set_vsmt_mode(sPAPRMachineState *spapr, Error **errp) @@ -2369,12 +2368,6 @@ static void ppc_spapr_init(MachineState *machine) } /* init CPUs */ - if (machine->cpu_model == NULL) { - machine->cpu_model = kvm_enabled() ? "host" : smc->tcg_default_cpu; - } - - cpu_parse_cpu_model(TYPE_POWERPC_CPU, machine->cpu_model); - spapr_set_vsmt_mode(spapr, &error_fatal); spapr_init_cpus(spapr); @@ -3277,7 +3270,7 @@ static void spapr_core_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev, MachineClass *mc = MACHINE_GET_CLASS(hotplug_dev); Error *local_err = NULL; CPUCore *cc = CPU_CORE(dev); - char *base_core_type = spapr_get_cpu_core_type(machine->cpu_model); + const char *base_core_type = spapr_get_cpu_core_type(machine->cpu_type); const char *type = object_get_typename(OBJECT(dev)); CPUArchId *core_slot; int index; @@ -3323,7 +3316,6 @@ static void spapr_core_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev, numa_cpu_pre_plug(core_slot, dev, &local_err); out: - g_free(base_core_type); error_propagate(errp, local_err); } @@ -3622,7 +3614,7 @@ static void spapr_machine_class_init(ObjectClass *oc, void *data) hc->unplug_request = spapr_machine_device_unplug_request; smc->dr_lmb_enabled = true; - smc->tcg_default_cpu = "power8_v2.0"; + mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power8_v2.0"); mc->has_hotpluggable_cpus = true; smc->resize_hpt_default = SPAPR_RESIZE_HPT_ENABLED; fwc->get_dev_path = spapr_get_fw_dev_path; @@ -3868,7 +3860,7 @@ static void spapr_machine_2_7_class_options(MachineClass *mc) sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc); spapr_machine_2_8_class_options(mc); - smc->tcg_default_cpu = "power7_v2.3"; + mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power7_v2.3"); SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_7); smc->phb_placement = phb_placement_2_7; } diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index 7dbf9c31c5..195762d8d2 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -61,29 +61,19 @@ static void spapr_cpu_init(sPAPRMachineState *spapr, PowerPCCPU *cpu, * Return the sPAPR CPU core type for @model which essentially is the CPU * model specified with -cpu cmdline option. */ -char *spapr_get_cpu_core_type(const char *model) +const char *spapr_get_cpu_core_type(const char *cpu_type) { - char *core_type; - gchar **model_pieces = g_strsplit(model, ",", 2); - gchar *cpu_model = g_ascii_strdown(model_pieces[0], -1); - g_strfreev(model_pieces); - - core_type = g_strdup_printf("%s-" TYPE_SPAPR_CPU_CORE, cpu_model); - - /* Check whether it exists or whether we have to look up an alias name */ - if (!object_class_by_name(core_type)) { - const char *realmodel; - - g_free(core_type); - core_type = NULL; - realmodel = ppc_cpu_lookup_alias(cpu_model); - if (realmodel) { - core_type = spapr_get_cpu_core_type(realmodel); - } + int len = strlen(cpu_type) - strlen(POWERPC_CPU_TYPE_SUFFIX); + char *core_type = g_strdup_printf(SPAPR_CPU_CORE_TYPE_NAME("%.*s"), + len, cpu_type); + ObjectClass *oc = object_class_by_name(core_type); + + g_free(core_type); + if (!oc) { + return NULL; } - g_free(cpu_model); - return core_type; + return object_class_get_name(oc); } static void spapr_cpu_core_unrealizefn(DeviceState *dev, Error **errp) diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 8ca4f9498f..9d21ca9bde 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -60,7 +60,6 @@ struct sPAPRMachineClass { /*< public >*/ bool dr_lmb_enabled; /* enable dynamic-reconfig/hotplug of LMBs */ bool use_ohci_by_default; /* use USB-OHCI instead of XHCI */ - const char *tcg_default_cpu; /* which (TCG) CPU to simulate by default */ bool pre_2_10_has_unused_icps; void (*phb_placement)(sPAPRMachineState *spapr, uint32_t index, uint64_t *buid, hwaddr *pio, diff --git a/include/hw/ppc/spapr_cpu_core.h b/include/hw/ppc/spapr_cpu_core.h index 42765de392..f2d48d6a67 100644 --- a/include/hw/ppc/spapr_cpu_core.h +++ b/include/hw/ppc/spapr_cpu_core.h @@ -37,5 +37,5 @@ typedef struct sPAPRCPUCoreClass { const char *cpu_type; } sPAPRCPUCoreClass; -char *spapr_get_cpu_core_type(const char *model); +const char *spapr_get_cpu_core_type(const char *cpu_type); #endif diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 64aef17f6f..989761b795 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -1278,7 +1278,6 @@ extern const struct VMStateDescription vmstate_ppc_cpu; /*****************************************************************************/ void ppc_translate_init(void); -const char *ppc_cpu_lookup_alias(const char *alias); /* you can call this signal handler from your SIGBUS and SIGSEGV signal handlers to inform the virtual CPU of exceptions. non zero is returned if the signal was handled by the virtual CPU. */ diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c index cb5777afa0..9d57debf0e 100644 --- a/target/ppc/kvm.c +++ b/target/ppc/kvm.c @@ -123,7 +123,7 @@ static bool kvmppc_is_pr(KVMState *ks) return kvm_vm_check_extension(ks, KVM_CAP_PPC_GET_PVINFO) != 0; } -static int kvm_ppc_register_host_cpu_type(void); +static int kvm_ppc_register_host_cpu_type(MachineState *ms); int kvm_arch_init(MachineState *ms, KVMState *s) { @@ -163,7 +163,7 @@ int kvm_arch_init(MachineState *ms, KVMState *s) "VM to stall at times!\n"); } - kvm_ppc_register_host_cpu_type(); + kvm_ppc_register_host_cpu_type(ms); return 0; } @@ -2487,12 +2487,13 @@ PowerPCCPUClass *kvm_ppc_get_host_cpu_class(void) return pvr_pcc; } -static int kvm_ppc_register_host_cpu_type(void) +static int kvm_ppc_register_host_cpu_type(MachineState *ms) { TypeInfo type_info = { .name = TYPE_HOST_POWERPC_CPU, .class_init = kvmppc_host_cpu_class_init, }; + MachineClass *mc = MACHINE_GET_CLASS(ms); PowerPCCPUClass *pvr_pcc; ObjectClass *oc; DeviceClass *dc; @@ -2504,6 +2505,10 @@ static int kvm_ppc_register_host_cpu_type(void) } type_info.parent = object_class_get_name(OBJECT_CLASS(pvr_pcc)); type_register(&type_info); + if (object_dynamic_cast(OBJECT(ms), TYPE_SPAPR_MACHINE)) { + /* override TCG default cpu type with 'host' cpu model */ + mc->default_cpu_type = TYPE_HOST_POWERPC_CPU; + } oc = object_class_by_name(type_info.name); g_assert(oc); diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c index 17ac95b732..7b9bf6a773 100644 --- a/target/ppc/translate_init.c +++ b/target/ppc/translate_init.c @@ -10060,7 +10060,7 @@ PowerPCCPUClass *ppc_cpu_class_by_pvr_mask(uint32_t pvr) return pcc; } -const char *ppc_cpu_lookup_alias(const char *alias) +static const char *ppc_cpu_lookup_alias(const char *alias) { int ai; -- cgit v1.2.3-55-g7522 From 4a12c699d3fe08087381bd633284abae689b3999 Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Mon, 9 Oct 2017 21:51:06 +0200 Subject: ppc: pnv: use generic cpu_model parsing use common cpu_model prasing in vl.c and set default cpu_model using generic MachineClass::default_cpu_type. Beside of switching to generic infrastructure it solves several issues. * ppc_cpu_class_by_name() is used to deal with lower/upper case and alias translations into actual cpu type, which fixes '-M powernv -cpu power8' and '-M powernv -cpu power9_v1.0' usecases which error out with: 'invalid CPU model 'FOO' for powernv machine' * allows to switch to lower-case typenames in pnv chip/core name (by convention typnames should be lower-case) * replace aliased names /power8, power9, .../ with exact cpu model names (i.e. typenames should be stable but aliases might decide to point to other cpu model withi family or changed by kvm). It will also help to simplify pnv_chip/core code and get rid of dependency on cpu_model parsing. Signed-off-by: Igor Mammedov Reviewed-by: Cédric Le Goater [dwg: Updated to make DD2.0 as default POWER9 chip] Signed-off-by: David Gibson --- hw/ppc/pnv.c | 22 ++++++++++------------ hw/ppc/pnv_core.c | 2 +- include/hw/ppc/pnv.h | 8 ++++---- 3 files changed, 15 insertions(+), 17 deletions(-) (limited to 'include') diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 84b2389ea6..a2cb4a40ff 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -606,16 +606,13 @@ static void ppc_powernv_init(MachineState *machine) } } - /* We need some cpu model to instantiate the PnvChip class */ - if (machine->cpu_model == NULL) { - machine->cpu_model = "POWER8"; - } - /* Create the processor chips */ - chip_typename = g_strdup_printf(TYPE_PNV_CHIP "-%s", machine->cpu_model); + i = strlen(machine->cpu_type) - strlen(POWERPC_CPU_TYPE_SUFFIX); + chip_typename = g_strdup_printf(TYPE_PNV_CHIP "-%.*s", + i, machine->cpu_type); if (!object_class_by_name(chip_typename)) { - error_report("invalid CPU model '%s' for %s machine", - machine->cpu_model, MACHINE_GET_CLASS(machine)->name); + error_report("invalid CPU model '%.*s' for %s machine", + i, machine->cpu_type, MACHINE_GET_CLASS(machine)->name); exit(1); } @@ -715,7 +712,7 @@ static void pnv_chip_power8e_class_init(ObjectClass *klass, void *data) DeviceClass *dc = DEVICE_CLASS(klass); PnvChipClass *k = PNV_CHIP_CLASS(klass); - k->cpu_model = "POWER8E"; + k->cpu_model = "power8e_v2.1"; k->chip_type = PNV_CHIP_POWER8E; k->chip_cfam_id = 0x221ef04980000000ull; /* P8 Murano DD2.1 */ k->cores_mask = POWER8E_CORE_MASK; @@ -737,7 +734,7 @@ static void pnv_chip_power8_class_init(ObjectClass *klass, void *data) DeviceClass *dc = DEVICE_CLASS(klass); PnvChipClass *k = PNV_CHIP_CLASS(klass); - k->cpu_model = "POWER8"; + k->cpu_model = "power8_v2.0"; k->chip_type = PNV_CHIP_POWER8; k->chip_cfam_id = 0x220ea04980000000ull; /* P8 Venice DD2.0 */ k->cores_mask = POWER8_CORE_MASK; @@ -759,7 +756,7 @@ static void pnv_chip_power8nvl_class_init(ObjectClass *klass, void *data) DeviceClass *dc = DEVICE_CLASS(klass); PnvChipClass *k = PNV_CHIP_CLASS(klass); - k->cpu_model = "POWER8NVL"; + k->cpu_model = "power8nvl_v1.0"; k->chip_type = PNV_CHIP_POWER8NVL; k->chip_cfam_id = 0x120d304980000000ull; /* P8 Naples DD1.0 */ k->cores_mask = POWER8_CORE_MASK; @@ -781,7 +778,7 @@ static void pnv_chip_power9_class_init(ObjectClass *klass, void *data) DeviceClass *dc = DEVICE_CLASS(klass); PnvChipClass *k = PNV_CHIP_CLASS(klass); - k->cpu_model = "POWER9"; + k->cpu_model = "power9_v2.0"; k->chip_type = PNV_CHIP_POWER9; k->chip_cfam_id = 0x100d104980000000ull; /* P9 Nimbus DD1.0 */ k->cores_mask = POWER9_CORE_MASK; @@ -1132,6 +1129,7 @@ static void powernv_machine_class_init(ObjectClass *oc, void *data) mc->init = ppc_powernv_init; mc->reset = ppc_powernv_reset; mc->max_cpus = MAX_CPUS; + mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power8_v2.0"); mc->block_default_type = IF_IDE; /* Pnv provides a AHCI device for * storage */ mc->no_parallel = 1; diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c index 67264830db..91f02cb324 100644 --- a/hw/ppc/pnv_core.c +++ b/hw/ppc/pnv_core.c @@ -227,7 +227,7 @@ static const TypeInfo pnv_core_info = { }; static const char *pnv_core_models[] = { - "POWER8E", "POWER8", "POWER8NVL", "POWER9" + "power8e_v2.1", "power8_v2.0", "power8nvl_v1.0", "power9_v2.0" }; static void pnv_core_register_types(void) diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h index 9c5437dabc..d80fa44bf0 100644 --- a/include/hw/ppc/pnv.h +++ b/include/hw/ppc/pnv.h @@ -80,19 +80,19 @@ typedef struct PnvChipClass { uint32_t (*core_pir)(PnvChip *chip, uint32_t core_id); } PnvChipClass; -#define TYPE_PNV_CHIP_POWER8E TYPE_PNV_CHIP "-POWER8E" +#define TYPE_PNV_CHIP_POWER8E TYPE_PNV_CHIP "-power8e_v2.1" #define PNV_CHIP_POWER8E(obj) \ OBJECT_CHECK(PnvChip, (obj), TYPE_PNV_CHIP_POWER8E) -#define TYPE_PNV_CHIP_POWER8 TYPE_PNV_CHIP "-POWER8" +#define TYPE_PNV_CHIP_POWER8 TYPE_PNV_CHIP "-power8_v2.0" #define PNV_CHIP_POWER8(obj) \ OBJECT_CHECK(PnvChip, (obj), TYPE_PNV_CHIP_POWER8) -#define TYPE_PNV_CHIP_POWER8NVL TYPE_PNV_CHIP "-POWER8NVL" +#define TYPE_PNV_CHIP_POWER8NVL TYPE_PNV_CHIP "-power8nvl_v1.0" #define PNV_CHIP_POWER8NVL(obj) \ OBJECT_CHECK(PnvChip, (obj), TYPE_PNV_CHIP_POWER8NVL) -#define TYPE_PNV_CHIP_POWER9 TYPE_PNV_CHIP "-POWER9" +#define TYPE_PNV_CHIP_POWER9 TYPE_PNV_CHIP "-power9_v2.0" #define PNV_CHIP_POWER9(obj) \ OBJECT_CHECK(PnvChip, (obj), TYPE_PNV_CHIP_POWER9) -- cgit v1.2.3-55-g7522 From 7fd544d8a754129b1a09281535a16daffc781f92 Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Mon, 9 Oct 2017 21:51:07 +0200 Subject: ppc: pnv: normalize core/chip type names typically for cpus/core type names following convention is used new_type_prefix-superclass_typename make PNV core/chip to follow common convention. Signed-off-by: Igor Mammedov Reviewed-by: Cédric Le Goater Acked-by: David Gibson Signed-off-by: David Gibson --- hw/ppc/pnv.c | 2 +- hw/ppc/pnv_core.c | 2 +- include/hw/ppc/pnv.h | 11 +++++++---- include/hw/ppc/pnv_core.h | 2 ++ 4 files changed, 11 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index a2cb4a40ff..1e78b685a3 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -608,7 +608,7 @@ static void ppc_powernv_init(MachineState *machine) /* Create the processor chips */ i = strlen(machine->cpu_type) - strlen(POWERPC_CPU_TYPE_SUFFIX); - chip_typename = g_strdup_printf(TYPE_PNV_CHIP "-%.*s", + chip_typename = g_strdup_printf(PNV_CHIP_TYPE_NAME("%.*s"), i, machine->cpu_type); if (!object_class_by_name(chip_typename)) { error_report("invalid CPU model '%.*s' for %s machine", diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c index 91f02cb324..85b39a5b5e 100644 --- a/hw/ppc/pnv_core.c +++ b/hw/ppc/pnv_core.c @@ -252,5 +252,5 @@ type_init(pnv_core_register_types) char *pnv_core_typename(const char *model) { - return g_strdup_printf(TYPE_PNV_CORE "-%s", model); + return g_strdup_printf(PNV_CORE_TYPE_NAME("%s"), model); } diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h index d80fa44bf0..f1bfa6c499 100644 --- a/include/hw/ppc/pnv.h +++ b/include/hw/ppc/pnv.h @@ -80,19 +80,22 @@ typedef struct PnvChipClass { uint32_t (*core_pir)(PnvChip *chip, uint32_t core_id); } PnvChipClass; -#define TYPE_PNV_CHIP_POWER8E TYPE_PNV_CHIP "-power8e_v2.1" +#define PNV_CHIP_TYPE_SUFFIX "-" TYPE_PNV_CHIP +#define PNV_CHIP_TYPE_NAME(cpu_model) cpu_model PNV_CHIP_TYPE_SUFFIX + +#define TYPE_PNV_CHIP_POWER8E PNV_CHIP_TYPE_NAME("power8e_v2.1") #define PNV_CHIP_POWER8E(obj) \ OBJECT_CHECK(PnvChip, (obj), TYPE_PNV_CHIP_POWER8E) -#define TYPE_PNV_CHIP_POWER8 TYPE_PNV_CHIP "-power8_v2.0" +#define TYPE_PNV_CHIP_POWER8 PNV_CHIP_TYPE_NAME("power8_v2.0") #define PNV_CHIP_POWER8(obj) \ OBJECT_CHECK(PnvChip, (obj), TYPE_PNV_CHIP_POWER8) -#define TYPE_PNV_CHIP_POWER8NVL TYPE_PNV_CHIP "-power8nvl_v1.0" +#define TYPE_PNV_CHIP_POWER8NVL PNV_CHIP_TYPE_NAME("power8nvl_v1.0") #define PNV_CHIP_POWER8NVL(obj) \ OBJECT_CHECK(PnvChip, (obj), TYPE_PNV_CHIP_POWER8NVL) -#define TYPE_PNV_CHIP_POWER9 TYPE_PNV_CHIP "-power9_v2.0" +#define TYPE_PNV_CHIP_POWER9 PNV_CHIP_TYPE_NAME("power9_v2.0") #define PNV_CHIP_POWER9(obj) \ OBJECT_CHECK(PnvChip, (obj), TYPE_PNV_CHIP_POWER9) diff --git a/include/hw/ppc/pnv_core.h b/include/hw/ppc/pnv_core.h index 2955a41c90..3360c4b12d 100644 --- a/include/hw/ppc/pnv_core.h +++ b/include/hw/ppc/pnv_core.h @@ -45,6 +45,8 @@ typedef struct PnvCoreClass { ObjectClass *cpu_oc; } PnvCoreClass; +#define PNV_CORE_TYPE_SUFFIX "-" TYPE_PNV_CORE +#define PNV_CORE_TYPE_NAME(cpu_model) cpu_model PNV_CORE_TYPE_SUFFIX extern char *pnv_core_typename(const char *model); #endif /* _PPC_PNV_CORE_H */ -- cgit v1.2.3-55-g7522 From 35bdb9def236135a24c553c60d9e257985b18a1f Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Mon, 9 Oct 2017 21:51:08 +0200 Subject: ppc: pnv: drop PnvCoreClass::cpu_oc field deduce cpu type directly from core type instead of maintaining type mapping in PnvCoreClass::cpu_oc and doing extra cpu_model parsing in pnv_core_class_init() Signed-off-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: David Gibson --- hw/ppc/pnv_core.c | 18 ++++++++++++------ include/hw/ppc/pnv_core.h | 1 - 2 files changed, 12 insertions(+), 7 deletions(-) (limited to 'include') diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c index 85b39a5b5e..135d3fa29f 100644 --- a/hw/ppc/pnv_core.c +++ b/hw/ppc/pnv_core.c @@ -27,6 +27,16 @@ #include "hw/ppc/pnv_xscom.h" #include "hw/ppc/xics.h" +static const char *pnv_core_cpu_typename(PnvCore *pc) +{ + const char *core_type = object_class_get_name(object_get_class(OBJECT(pc))); + int len = strlen(core_type) - strlen(PNV_CORE_TYPE_SUFFIX); + char *s = g_strdup_printf(POWERPC_CPU_TYPE_NAME("%.*s"), len, core_type); + const char *cpu_type = object_class_get_name(object_class_by_name(s)); + g_free(s); + return cpu_type; +} + static void powernv_cpu_reset(void *opaque) { PowerPCCPU *cpu = opaque; @@ -148,8 +158,7 @@ static void pnv_core_realize(DeviceState *dev, Error **errp) { PnvCore *pc = PNV_CORE(OBJECT(dev)); CPUCore *cc = CPU_CORE(OBJECT(dev)); - PnvCoreClass *pcc = PNV_CORE_GET_CLASS(OBJECT(dev)); - const char *typename = object_class_get_name(pcc->cpu_oc); + const char *typename = pnv_core_cpu_typename(pc); size_t size = object_type_get_instance_size(typename); Error *local_err = NULL; void *obj; @@ -211,11 +220,9 @@ static Property pnv_core_properties[] = { static void pnv_core_class_init(ObjectClass *oc, void *data) { DeviceClass *dc = DEVICE_CLASS(oc); - PnvCoreClass *pcc = PNV_CORE_CLASS(oc); dc->realize = pnv_core_realize; dc->props = pnv_core_properties; - pcc->cpu_oc = cpu_class_by_name(TYPE_POWERPC_CPU, data); } static const TypeInfo pnv_core_info = { @@ -223,6 +230,7 @@ static const TypeInfo pnv_core_info = { .parent = TYPE_CPU_CORE, .instance_size = sizeof(PnvCore), .class_size = sizeof(PnvCoreClass), + .class_init = pnv_core_class_init, .abstract = true, }; @@ -239,8 +247,6 @@ static void pnv_core_register_types(void) TypeInfo ti = { .parent = TYPE_PNV_CORE, .instance_size = sizeof(PnvCore), - .class_init = pnv_core_class_init, - .class_data = (void *) pnv_core_models[i], }; ti.name = pnv_core_typename(pnv_core_models[i]); type_register(&ti); diff --git a/include/hw/ppc/pnv_core.h b/include/hw/ppc/pnv_core.h index 3360c4b12d..a336a1f18a 100644 --- a/include/hw/ppc/pnv_core.h +++ b/include/hw/ppc/pnv_core.h @@ -42,7 +42,6 @@ typedef struct PnvCore { typedef struct PnvCoreClass { DeviceClass parent_class; - ObjectClass *cpu_oc; } PnvCoreClass; #define PNV_CORE_TYPE_SUFFIX "-" TYPE_PNV_CORE -- cgit v1.2.3-55-g7522 From 40abf43f72b584d426d7b27ab2528ecd12eceff6 Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Mon, 9 Oct 2017 21:51:10 +0200 Subject: ppc: pnv: drop PnvChipClass::cpu_model field deduce core type directly from chip type instead of maintaining type mapping in PnvChipClass::cpu_model. Signed-off-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: David Gibson --- hw/ppc/pnv.c | 25 +++++++++++++------------ hw/ppc/pnv_core.c | 5 ----- include/hw/ppc/pnv.h | 1 - include/hw/ppc/pnv_core.h | 1 - 4 files changed, 13 insertions(+), 19 deletions(-) (limited to 'include') diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 1e78b685a3..80c7f62bbc 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -55,6 +55,16 @@ #define KERNEL_LOAD_ADDR 0x20000000 #define INITRD_LOAD_ADDR 0x40000000 +static const char *pnv_chip_core_typename(const PnvChip *o) +{ + const char *chip_type = object_class_get_name(object_get_class(OBJECT(o))); + int len = strlen(chip_type) - strlen(PNV_CHIP_TYPE_SUFFIX); + char *s = g_strdup_printf(PNV_CORE_TYPE_NAME("%.*s"), len, chip_type); + const char *core_type = object_class_get_name(object_class_by_name(s)); + g_free(s); + return core_type; +} + /* * On Power Systems E880 (POWER8), the max cpus (threads) should be : * 4 * 4 sockets * 12 cores * 8 threads = 1536 @@ -269,8 +279,7 @@ static int pnv_chip_lpc_offset(PnvChip *chip, void *fdt) static void powernv_populate_chip(PnvChip *chip, void *fdt) { - PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip); - char *typename = pnv_core_typename(pcc->cpu_model); + const char *typename = pnv_chip_core_typename(chip); size_t typesize = object_type_get_instance_size(typename); int i; @@ -300,7 +309,6 @@ static void powernv_populate_chip(PnvChip *chip, void *fdt) powernv_populate_memory_node(fdt, chip->chip_id, chip->ram_start, chip->ram_size); } - g_free(typename); } static void powernv_populate_rtc(ISADevice *d, void *fdt, int lpc_off) @@ -712,7 +720,6 @@ static void pnv_chip_power8e_class_init(ObjectClass *klass, void *data) DeviceClass *dc = DEVICE_CLASS(klass); PnvChipClass *k = PNV_CHIP_CLASS(klass); - k->cpu_model = "power8e_v2.1"; k->chip_type = PNV_CHIP_POWER8E; k->chip_cfam_id = 0x221ef04980000000ull; /* P8 Murano DD2.1 */ k->cores_mask = POWER8E_CORE_MASK; @@ -734,7 +741,6 @@ static void pnv_chip_power8_class_init(ObjectClass *klass, void *data) DeviceClass *dc = DEVICE_CLASS(klass); PnvChipClass *k = PNV_CHIP_CLASS(klass); - k->cpu_model = "power8_v2.0"; k->chip_type = PNV_CHIP_POWER8; k->chip_cfam_id = 0x220ea04980000000ull; /* P8 Venice DD2.0 */ k->cores_mask = POWER8_CORE_MASK; @@ -756,7 +762,6 @@ static void pnv_chip_power8nvl_class_init(ObjectClass *klass, void *data) DeviceClass *dc = DEVICE_CLASS(klass); PnvChipClass *k = PNV_CHIP_CLASS(klass); - k->cpu_model = "power8nvl_v1.0"; k->chip_type = PNV_CHIP_POWER8NVL; k->chip_cfam_id = 0x120d304980000000ull; /* P8 Naples DD1.0 */ k->cores_mask = POWER8_CORE_MASK; @@ -778,7 +783,6 @@ static void pnv_chip_power9_class_init(ObjectClass *klass, void *data) DeviceClass *dc = DEVICE_CLASS(klass); PnvChipClass *k = PNV_CHIP_CLASS(klass); - k->cpu_model = "power9_v2.0"; k->chip_type = PNV_CHIP_POWER9; k->chip_cfam_id = 0x100d104980000000ull; /* P9 Nimbus DD1.0 */ k->cores_mask = POWER9_CORE_MASK; @@ -853,7 +857,7 @@ static void pnv_chip_init(Object *obj) static void pnv_chip_icp_realize(PnvChip *chip, Error **errp) { PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip); - char *typename = pnv_core_typename(pcc->cpu_model); + const char *typename = pnv_chip_core_typename(chip); size_t typesize = object_type_get_instance_size(typename); int i, j; char *name; @@ -878,8 +882,6 @@ static void pnv_chip_icp_realize(PnvChip *chip, Error **errp) memory_region_add_subregion(&chip->icp_mmio, pir << 12, &icp->mmio); } } - - g_free(typename); } static void pnv_chip_realize(DeviceState *dev, Error **errp) @@ -887,7 +889,7 @@ static void pnv_chip_realize(DeviceState *dev, Error **errp) PnvChip *chip = PNV_CHIP(dev); Error *error = NULL; PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip); - char *typename = pnv_core_typename(pcc->cpu_model); + const char *typename = pnv_chip_core_typename(chip); size_t typesize = object_type_get_instance_size(typename); int i, core_hwid; @@ -946,7 +948,6 @@ static void pnv_chip_realize(DeviceState *dev, Error **errp) &PNV_CORE(pnv_core)->xscom_regs); i++; } - g_free(typename); /* Create LPC controller */ object_property_set_bool(OBJECT(&chip->lpc), true, "realized", diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c index 350394fdb5..82ff440b33 100644 --- a/hw/ppc/pnv_core.c +++ b/hw/ppc/pnv_core.c @@ -246,9 +246,4 @@ static const TypeInfo pnv_core_infos[] = { DEFINE_PNV_CORE_TYPE("power9_v2.0"), }; -char *pnv_core_typename(const char *model) -{ - return g_strdup_printf(PNV_CORE_TYPE_NAME("%s"), model); -} - DEFINE_TYPES(pnv_core_infos) diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h index f1bfa6c499..59524cd42b 100644 --- a/include/hw/ppc/pnv.h +++ b/include/hw/ppc/pnv.h @@ -69,7 +69,6 @@ typedef struct PnvChipClass { SysBusDeviceClass parent_class; /*< public >*/ - const char *cpu_model; PnvChipType chip_type; uint64_t chip_cfam_id; uint64_t cores_mask; diff --git a/include/hw/ppc/pnv_core.h b/include/hw/ppc/pnv_core.h index a336a1f18a..e337af7a3a 100644 --- a/include/hw/ppc/pnv_core.h +++ b/include/hw/ppc/pnv_core.h @@ -46,6 +46,5 @@ typedef struct PnvCoreClass { #define PNV_CORE_TYPE_SUFFIX "-" TYPE_PNV_CORE #define PNV_CORE_TYPE_NAME(cpu_model) cpu_model PNV_CORE_TYPE_SUFFIX -extern char *pnv_core_typename(const char *model); #endif /* _PPC_PNV_CORE_H */ -- cgit v1.2.3-55-g7522