From c4b2c40c0eea3bc8ad286a6a1a62209c4bc332e3 Mon Sep 17 00:00:00 2001 From: Greg Kurz Date: Fri, 13 Dec 2019 13:00:13 +0100 Subject: ppc/pnv: Introduce PnvChipClass::xscom_core_base() method The pnv_chip_core_realize() function configures the XSCOM MMIO subregion for each core of a single chip. The base address of the subregion depends on the CPU type. Its computation is currently open-code using the pnv_chip_is_powerXX() helpers. This can be achieved with QOM. Introduce a method for this in the base chip class and implement it in child classes. Signed-off-by: Greg Kurz Message-Id: <157623841311.360005.4705705734873339545.stgit@bahia.lan> Reviewed-by: Cédric Le Goater Signed-off-by: David Gibson --- include/hw/ppc/pnv.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h index 7d2402784d..17ca9a14ac 100644 --- a/include/hw/ppc/pnv.h +++ b/include/hw/ppc/pnv.h @@ -137,6 +137,7 @@ typedef struct PnvChipClass { ISABus *(*isa_create)(PnvChip *chip, Error **errp); void (*dt_populate)(PnvChip *chip, void *fdt); void (*pic_print_info)(PnvChip *chip, Monitor *mon); + uint64_t (*xscom_core_base)(PnvChip *chip, uint32_t core_id); } PnvChipClass; #define PNV_CHIP_TYPE_SUFFIX "-" TYPE_PNV_CHIP -- cgit v1.2.3-55-g7522