From a65f4d4028de99ce172ffa3c18095b4f1bf7ee45 Mon Sep 17 00:00:00 2001 From: Corey Minyard Date: Wed, 7 Nov 2018 16:33:09 -0600 Subject: qdev: Add a no default uuid property This is for IPMI, which will behave differently if the UUID is not set. Signed-off-by: Corey Minyard Cc: Fam Zheng Cc: Michael S. Tsirkin Cc: Marc-André Lureau Reviewed-by: Paolo Bonzini --- include/hw/qdev-properties.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'include') diff --git a/include/hw/qdev-properties.h b/include/hw/qdev-properties.h index 2e98dd60db..c6a8cb5516 100644 --- a/include/hw/qdev-properties.h +++ b/include/hw/qdev-properties.h @@ -238,6 +238,13 @@ extern const PropertyInfo qdev_prop_pcie_link_width; #define DEFINE_PROP_AUDIODEV(_n, _s, _f) \ DEFINE_PROP(_n, _s, _f, qdev_prop_audiodev, QEMUSoundCard) +#define DEFINE_PROP_UUID_NODEFAULT(_name, _state, _field) { \ + .name = (_name), \ + .info = &qdev_prop_uuid, \ + .offset = offsetof(_state, _field) \ + + type_check(QemuUUID, typeof_field(_state, _field)), \ + } + #define DEFINE_PROP_END_OF_LIST() \ {} -- cgit v1.2.3-55-g7522 From 0f310cd6e1218728ddba54afdfbddc66e2db0012 Mon Sep 17 00:00:00 2001 From: Corey Minyard Date: Wed, 6 Dec 2017 07:34:24 -0600 Subject: ipmi: Split out KCS-specific code from ISA KCS code Get ready for PCI and other KCS interfaces. No functional changes, just split the code into the generic KCS code and the ISA-specific code. Signed-off-by: Corey Minyard Reviewed-by: Philippe Mathieu-Daudé --- hw/ipmi/Makefile.objs | 2 +- hw/ipmi/ipmi_kcs.c | 408 ++++++++++++++++++++++++++++++++++++++++++++ hw/ipmi/isa_ipmi_kcs.c | 417 +++------------------------------------------ include/hw/ipmi/ipmi_kcs.h | 75 ++++++++ 4 files changed, 505 insertions(+), 397 deletions(-) create mode 100644 hw/ipmi/ipmi_kcs.c create mode 100644 include/hw/ipmi/ipmi_kcs.h (limited to 'include') diff --git a/hw/ipmi/Makefile.objs b/hw/ipmi/Makefile.objs index 1b422bbee0..6835d2f64a 100644 --- a/hw/ipmi/Makefile.objs +++ b/hw/ipmi/Makefile.objs @@ -1,4 +1,4 @@ -common-obj-$(CONFIG_IPMI) += ipmi.o +common-obj-$(CONFIG_IPMI) += ipmi.o ipmi_kcs.o common-obj-$(CONFIG_IPMI_LOCAL) += ipmi_bmc_sim.o common-obj-$(CONFIG_IPMI_EXTERN) += ipmi_bmc_extern.o common-obj-$(CONFIG_ISA_IPMI_KCS) += isa_ipmi_kcs.o diff --git a/hw/ipmi/ipmi_kcs.c b/hw/ipmi/ipmi_kcs.c new file mode 100644 index 0000000000..dab1af8bc8 --- /dev/null +++ b/hw/ipmi/ipmi_kcs.c @@ -0,0 +1,408 @@ +/* + * QEMU IPMI KCS emulation + * + * Copyright (c) 2015,2017 Corey Minyard, MontaVista Software, LLC + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#include "qemu/osdep.h" +#include "migration/vmstate.h" +#include "qemu/log.h" +#include "qapi/error.h" +#include "hw/ipmi/ipmi_kcs.h" + +#define IPMI_KCS_OBF_BIT 0 +#define IPMI_KCS_IBF_BIT 1 +#define IPMI_KCS_SMS_ATN_BIT 2 +#define IPMI_KCS_CD_BIT 3 + +#define IPMI_KCS_OBF_MASK (1 << IPMI_KCS_OBF_BIT) +#define IPMI_KCS_GET_OBF(d) (((d) >> IPMI_KCS_OBF_BIT) & 0x1) +#define IPMI_KCS_SET_OBF(d, v) (d) = (((d) & ~IPMI_KCS_OBF_MASK) | \ + (((v) & 1) << IPMI_KCS_OBF_BIT)) +#define IPMI_KCS_IBF_MASK (1 << IPMI_KCS_IBF_BIT) +#define IPMI_KCS_GET_IBF(d) (((d) >> IPMI_KCS_IBF_BIT) & 0x1) +#define IPMI_KCS_SET_IBF(d, v) (d) = (((d) & ~IPMI_KCS_IBF_MASK) | \ + (((v) & 1) << IPMI_KCS_IBF_BIT)) +#define IPMI_KCS_SMS_ATN_MASK (1 << IPMI_KCS_SMS_ATN_BIT) +#define IPMI_KCS_GET_SMS_ATN(d) (((d) >> IPMI_KCS_SMS_ATN_BIT) & 0x1) +#define IPMI_KCS_SET_SMS_ATN(d, v) (d) = (((d) & ~IPMI_KCS_SMS_ATN_MASK) | \ + (((v) & 1) << IPMI_KCS_SMS_ATN_BIT)) +#define IPMI_KCS_CD_MASK (1 << IPMI_KCS_CD_BIT) +#define IPMI_KCS_GET_CD(d) (((d) >> IPMI_KCS_CD_BIT) & 0x1) +#define IPMI_KCS_SET_CD(d, v) (d) = (((d) & ~IPMI_KCS_CD_MASK) | \ + (((v) & 1) << IPMI_KCS_CD_BIT)) + +#define IPMI_KCS_IDLE_STATE 0 +#define IPMI_KCS_READ_STATE 1 +#define IPMI_KCS_WRITE_STATE 2 +#define IPMI_KCS_ERROR_STATE 3 + +#define IPMI_KCS_GET_STATE(d) (((d) >> 6) & 0x3) +#define IPMI_KCS_SET_STATE(d, v) ((d) = ((d) & ~0xc0) | (((v) & 0x3) << 6)) + +#define IPMI_KCS_ABORT_STATUS_CMD 0x60 +#define IPMI_KCS_WRITE_START_CMD 0x61 +#define IPMI_KCS_WRITE_END_CMD 0x62 +#define IPMI_KCS_READ_CMD 0x68 + +#define IPMI_KCS_STATUS_NO_ERR 0x00 +#define IPMI_KCS_STATUS_ABORTED_ERR 0x01 +#define IPMI_KCS_STATUS_BAD_CC_ERR 0x02 +#define IPMI_KCS_STATUS_LENGTH_ERR 0x06 + +static void ipmi_kcs_raise_irq(IPMIKCS *ik) +{ + if (ik->use_irq && ik->irqs_enabled && ik->raise_irq) { + ik->raise_irq(ik); + } +} + +static void ipmi_kcs_lower_irq(IPMIKCS *ik) +{ + if (ik->lower_irq) { + ik->lower_irq(ik); + } +} + +#define SET_OBF() \ + do { \ + IPMI_KCS_SET_OBF(ik->status_reg, 1); \ + if (!ik->obf_irq_set) { \ + ik->obf_irq_set = 1; \ + if (!ik->atn_irq_set) { \ + ipmi_kcs_raise_irq(ik); \ + } \ + } \ + } while (0) + +static void ipmi_kcs_signal(IPMIKCS *ik, IPMIInterface *ii) +{ + IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii); + + ik->do_wake = 1; + while (ik->do_wake) { + ik->do_wake = 0; + iic->handle_if_event(ii); + } +} + +static void ipmi_kcs_handle_event(IPMIInterface *ii) +{ + IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii); + IPMIKCS *ik = iic->get_backend_data(ii); + + if (ik->cmd_reg == IPMI_KCS_ABORT_STATUS_CMD) { + if (IPMI_KCS_GET_STATE(ik->status_reg) != IPMI_KCS_ERROR_STATE) { + ik->waiting_rsp++; /* Invalidate the message */ + ik->outmsg[0] = IPMI_KCS_STATUS_ABORTED_ERR; + ik->outlen = 1; + ik->outpos = 0; + IPMI_KCS_SET_STATE(ik->status_reg, IPMI_KCS_ERROR_STATE); + SET_OBF(); + } + goto out; + } + + switch (IPMI_KCS_GET_STATE(ik->status_reg)) { + case IPMI_KCS_IDLE_STATE: + if (ik->cmd_reg == IPMI_KCS_WRITE_START_CMD) { + IPMI_KCS_SET_STATE(ik->status_reg, IPMI_KCS_WRITE_STATE); + ik->cmd_reg = -1; + ik->write_end = 0; + ik->inlen = 0; + SET_OBF(); + } + break; + + case IPMI_KCS_READ_STATE: + handle_read: + if (ik->outpos >= ik->outlen) { + IPMI_KCS_SET_STATE(ik->status_reg, IPMI_KCS_IDLE_STATE); + SET_OBF(); + } else if (ik->data_in_reg == IPMI_KCS_READ_CMD) { + ik->data_out_reg = ik->outmsg[ik->outpos]; + ik->outpos++; + SET_OBF(); + } else { + ik->outmsg[0] = IPMI_KCS_STATUS_BAD_CC_ERR; + ik->outlen = 1; + ik->outpos = 0; + IPMI_KCS_SET_STATE(ik->status_reg, IPMI_KCS_ERROR_STATE); + SET_OBF(); + goto out; + } + break; + + case IPMI_KCS_WRITE_STATE: + if (ik->data_in_reg != -1) { + /* + * Don't worry about input overrun here, that will be + * handled in the BMC. + */ + if (ik->inlen < sizeof(ik->inmsg)) { + ik->inmsg[ik->inlen] = ik->data_in_reg; + } + ik->inlen++; + } + if (ik->write_end) { + IPMIBmcClass *bk = IPMI_BMC_GET_CLASS(ik->bmc); + ik->outlen = 0; + ik->write_end = 0; + ik->outpos = 0; + bk->handle_command(ik->bmc, ik->inmsg, ik->inlen, sizeof(ik->inmsg), + ik->waiting_rsp); + goto out_noibf; + } else if (ik->cmd_reg == IPMI_KCS_WRITE_END_CMD) { + ik->cmd_reg = -1; + ik->write_end = 1; + } + SET_OBF(); + break; + + case IPMI_KCS_ERROR_STATE: + if (ik->data_in_reg != -1) { + IPMI_KCS_SET_STATE(ik->status_reg, IPMI_KCS_READ_STATE); + ik->data_in_reg = IPMI_KCS_READ_CMD; + goto handle_read; + } + break; + } + + if (ik->cmd_reg != -1) { + /* Got an invalid command */ + ik->outmsg[0] = IPMI_KCS_STATUS_BAD_CC_ERR; + ik->outlen = 1; + ik->outpos = 0; + IPMI_KCS_SET_STATE(ik->status_reg, IPMI_KCS_ERROR_STATE); + } + + out: + ik->cmd_reg = -1; + ik->data_in_reg = -1; + IPMI_KCS_SET_IBF(ik->status_reg, 0); + out_noibf: + return; +} + +static void ipmi_kcs_handle_rsp(IPMIInterface *ii, uint8_t msg_id, + unsigned char *rsp, unsigned int rsp_len) +{ + IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii); + IPMIKCS *ik = iic->get_backend_data(ii); + + if (ik->waiting_rsp == msg_id) { + ik->waiting_rsp++; + if (rsp_len > sizeof(ik->outmsg)) { + ik->outmsg[0] = rsp[0]; + ik->outmsg[1] = rsp[1]; + ik->outmsg[2] = IPMI_CC_CANNOT_RETURN_REQ_NUM_BYTES; + ik->outlen = 3; + } else { + memcpy(ik->outmsg, rsp, rsp_len); + ik->outlen = rsp_len; + } + IPMI_KCS_SET_STATE(ik->status_reg, IPMI_KCS_READ_STATE); + ik->data_in_reg = IPMI_KCS_READ_CMD; + ipmi_kcs_signal(ik, ii); + } +} + + +static uint64_t ipmi_kcs_ioport_read(void *opaque, hwaddr addr, unsigned size) +{ + IPMIInterface *ii = opaque; + IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii); + IPMIKCS *ik = iic->get_backend_data(ii); + uint32_t ret; + + switch (addr & 1) { + case 0: + ret = ik->data_out_reg; + IPMI_KCS_SET_OBF(ik->status_reg, 0); + if (ik->obf_irq_set) { + ik->obf_irq_set = 0; + if (!ik->atn_irq_set) { + ipmi_kcs_lower_irq(ik); + } + } + break; + case 1: + ret = ik->status_reg; + if (ik->atn_irq_set) { + ik->atn_irq_set = 0; + if (!ik->obf_irq_set) { + ipmi_kcs_lower_irq(ik); + } + } + break; + } + return ret; +} + +static void ipmi_kcs_ioport_write(void *opaque, hwaddr addr, uint64_t val, + unsigned size) +{ + IPMIInterface *ii = opaque; + IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii); + IPMIKCS *ik = iic->get_backend_data(ii); + + if (IPMI_KCS_GET_IBF(ik->status_reg)) { + return; + } + + switch (addr & 1) { + case 0: + ik->data_in_reg = val; + break; + + case 1: + ik->cmd_reg = val; + break; + } + IPMI_KCS_SET_IBF(ik->status_reg, 1); + ipmi_kcs_signal(ik, ii); +} + +const MemoryRegionOps ipmi_kcs_io_ops = { + .read = ipmi_kcs_ioport_read, + .write = ipmi_kcs_ioport_write, + .impl = { + .min_access_size = 1, + .max_access_size = 1, + }, + .endianness = DEVICE_LITTLE_ENDIAN, +}; + +static void ipmi_kcs_set_atn(IPMIInterface *ii, int val, int irq) +{ + IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii); + IPMIKCS *ik = iic->get_backend_data(ii); + + IPMI_KCS_SET_SMS_ATN(ik->status_reg, val); + if (val) { + if (irq && !ik->atn_irq_set) { + ik->atn_irq_set = 1; + if (!ik->obf_irq_set) { + ipmi_kcs_raise_irq(ik); + } + } + } else { + if (ik->atn_irq_set) { + ik->atn_irq_set = 0; + if (!ik->obf_irq_set) { + ipmi_kcs_lower_irq(ik); + } + } + } +} + +static void ipmi_kcs_set_irq_enable(IPMIInterface *ii, int val) +{ + IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii); + IPMIKCS *ik = iic->get_backend_data(ii); + + ik->irqs_enabled = val; +} + +static void ipmi_kcs_init(IPMIInterface *ii, Error **errp) +{ + IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii); + IPMIKCS *ik = iic->get_backend_data(ii); + + ik->io_length = 2; + memory_region_init_io(&ik->io, NULL, &ipmi_kcs_io_ops, ii, "ipmi-kcs", 2); +} + +int ipmi_kcs_vmstate_post_load(void *opaque, int version) +{ + IPMIKCS *ik = opaque; + + /* Make sure all the values are sane. */ + if (ik->outpos >= MAX_IPMI_MSG_SIZE || ik->outlen >= MAX_IPMI_MSG_SIZE || + ik->outpos >= ik->outlen) { + qemu_log_mask(LOG_GUEST_ERROR, + "ipmi:kcs: vmstate transfer received bad out values: %d %d\n", + ik->outpos, ik->outlen); + ik->outpos = 0; + ik->outlen = 0; + } + + if (ik->inlen >= MAX_IPMI_MSG_SIZE) { + qemu_log_mask(LOG_GUEST_ERROR, + "ipmi:kcs: vmstate transfer received bad in value: %d\n", + ik->inlen); + ik->inlen = 0; + } + + return 0; +} + +static bool vmstate_kcs_before_version2(void *opaque, int version) +{ + return version <= 1; +} + +const VMStateDescription vmstate_IPMIKCS = { + .name = TYPE_IPMI_INTERFACE_PREFIX "kcs", + .version_id = 2, + .minimum_version_id = 1, + .post_load = ipmi_kcs_vmstate_post_load, + .fields = (VMStateField[]) { + VMSTATE_BOOL(obf_irq_set, IPMIKCS), + VMSTATE_BOOL(atn_irq_set, IPMIKCS), + VMSTATE_UNUSED_TEST(vmstate_kcs_before_version2, 1), /* Was use_irq */ + VMSTATE_BOOL(irqs_enabled, IPMIKCS), + VMSTATE_UINT32(outpos, IPMIKCS), + VMSTATE_UINT32_V(outlen, IPMIKCS, 2), + VMSTATE_UINT8_ARRAY(outmsg, IPMIKCS, MAX_IPMI_MSG_SIZE), + VMSTATE_UINT32_V(inlen, IPMIKCS, 2), + VMSTATE_UINT8_ARRAY(inmsg, IPMIKCS, MAX_IPMI_MSG_SIZE), + VMSTATE_BOOL(write_end, IPMIKCS), + VMSTATE_UINT8(status_reg, IPMIKCS), + VMSTATE_UINT8(data_out_reg, IPMIKCS), + VMSTATE_INT16(data_in_reg, IPMIKCS), + VMSTATE_INT16(cmd_reg, IPMIKCS), + VMSTATE_UINT8(waiting_rsp, IPMIKCS), + VMSTATE_END_OF_LIST() + } +}; + +void ipmi_kcs_get_fwinfo(IPMIKCS *ik, IPMIFwInfo *info) +{ + info->interface_name = "kcs"; + info->interface_type = IPMI_SMBIOS_KCS; + info->ipmi_spec_major_revision = 2; + info->ipmi_spec_minor_revision = 0; + info->base_address = ik->io_base; + info->i2c_slave_address = ik->bmc->slave_addr; + info->register_length = ik->io_length; + info->register_spacing = 1; + info->memspace = IPMI_MEMSPACE_IO; + info->irq_type = IPMI_LEVEL_IRQ; +} + +void ipmi_kcs_class_init(IPMIInterfaceClass *iic) +{ + iic->init = ipmi_kcs_init; + iic->set_atn = ipmi_kcs_set_atn; + iic->handle_rsp = ipmi_kcs_handle_rsp; + iic->handle_if_event = ipmi_kcs_handle_event; + iic->set_irq_enable = ipmi_kcs_set_irq_enable; +} diff --git a/hw/ipmi/isa_ipmi_kcs.c b/hw/ipmi/isa_ipmi_kcs.c index 374b2a0709..8e32774f85 100644 --- a/hw/ipmi/isa_ipmi_kcs.c +++ b/hw/ipmi/isa_ipmi_kcs.c @@ -1,7 +1,7 @@ /* * QEMU ISA IPMI KCS emulation * - * Copyright (c) 2015 Corey Minyard, MontaVista Software, LLC + * Copyright (c) 2015,2017 Corey Minyard, MontaVista Software, LLC * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -26,338 +26,12 @@ #include "qemu/log.h" #include "qemu/module.h" #include "qapi/error.h" -#include "hw/ipmi/ipmi.h" #include "hw/irq.h" +#include "hw/ipmi/ipmi_kcs.h" #include "hw/isa/isa.h" #include "hw/qdev-properties.h" #include "migration/vmstate.h" -#define IPMI_KCS_OBF_BIT 0 -#define IPMI_KCS_IBF_BIT 1 -#define IPMI_KCS_SMS_ATN_BIT 2 -#define IPMI_KCS_CD_BIT 3 - -#define IPMI_KCS_OBF_MASK (1 << IPMI_KCS_OBF_BIT) -#define IPMI_KCS_GET_OBF(d) (((d) >> IPMI_KCS_OBF_BIT) & 0x1) -#define IPMI_KCS_SET_OBF(d, v) (d) = (((d) & ~IPMI_KCS_OBF_MASK) | \ - (((v) & 1) << IPMI_KCS_OBF_BIT)) -#define IPMI_KCS_IBF_MASK (1 << IPMI_KCS_IBF_BIT) -#define IPMI_KCS_GET_IBF(d) (((d) >> IPMI_KCS_IBF_BIT) & 0x1) -#define IPMI_KCS_SET_IBF(d, v) (d) = (((d) & ~IPMI_KCS_IBF_MASK) | \ - (((v) & 1) << IPMI_KCS_IBF_BIT)) -#define IPMI_KCS_SMS_ATN_MASK (1 << IPMI_KCS_SMS_ATN_BIT) -#define IPMI_KCS_GET_SMS_ATN(d) (((d) >> IPMI_KCS_SMS_ATN_BIT) & 0x1) -#define IPMI_KCS_SET_SMS_ATN(d, v) (d) = (((d) & ~IPMI_KCS_SMS_ATN_MASK) | \ - (((v) & 1) << IPMI_KCS_SMS_ATN_BIT)) -#define IPMI_KCS_CD_MASK (1 << IPMI_KCS_CD_BIT) -#define IPMI_KCS_GET_CD(d) (((d) >> IPMI_KCS_CD_BIT) & 0x1) -#define IPMI_KCS_SET_CD(d, v) (d) = (((d) & ~IPMI_KCS_CD_MASK) | \ - (((v) & 1) << IPMI_KCS_CD_BIT)) - -#define IPMI_KCS_IDLE_STATE 0 -#define IPMI_KCS_READ_STATE 1 -#define IPMI_KCS_WRITE_STATE 2 -#define IPMI_KCS_ERROR_STATE 3 - -#define IPMI_KCS_GET_STATE(d) (((d) >> 6) & 0x3) -#define IPMI_KCS_SET_STATE(d, v) ((d) = ((d) & ~0xc0) | (((v) & 0x3) << 6)) - -#define IPMI_KCS_ABORT_STATUS_CMD 0x60 -#define IPMI_KCS_WRITE_START_CMD 0x61 -#define IPMI_KCS_WRITE_END_CMD 0x62 -#define IPMI_KCS_READ_CMD 0x68 - -#define IPMI_KCS_STATUS_NO_ERR 0x00 -#define IPMI_KCS_STATUS_ABORTED_ERR 0x01 -#define IPMI_KCS_STATUS_BAD_CC_ERR 0x02 -#define IPMI_KCS_STATUS_LENGTH_ERR 0x06 - -typedef struct IPMIKCS { - IPMIBmc *bmc; - - bool do_wake; - - qemu_irq irq; - - uint32_t io_base; - unsigned long io_length; - MemoryRegion io; - - bool obf_irq_set; - bool atn_irq_set; - bool use_irq; - bool irqs_enabled; - - uint8_t outmsg[MAX_IPMI_MSG_SIZE]; - uint32_t outpos; - uint32_t outlen; - - uint8_t inmsg[MAX_IPMI_MSG_SIZE]; - uint32_t inlen; - bool write_end; - - uint8_t status_reg; - uint8_t data_out_reg; - - int16_t data_in_reg; /* -1 means not written */ - int16_t cmd_reg; - - /* - * This is a response number that we send with the command to make - * sure that the response matches the command. - */ - uint8_t waiting_rsp; -} IPMIKCS; - -#define SET_OBF() \ - do { \ - IPMI_KCS_SET_OBF(ik->status_reg, 1); \ - if (ik->use_irq && ik->irqs_enabled && !ik->obf_irq_set) { \ - ik->obf_irq_set = 1; \ - if (!ik->atn_irq_set) { \ - qemu_irq_raise(ik->irq); \ - } \ - } \ - } while (0) - -static void ipmi_kcs_signal(IPMIKCS *ik, IPMIInterface *ii) -{ - IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii); - - ik->do_wake = 1; - while (ik->do_wake) { - ik->do_wake = 0; - iic->handle_if_event(ii); - } -} - -static void ipmi_kcs_handle_event(IPMIInterface *ii) -{ - IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii); - IPMIKCS *ik = iic->get_backend_data(ii); - - if (ik->cmd_reg == IPMI_KCS_ABORT_STATUS_CMD) { - if (IPMI_KCS_GET_STATE(ik->status_reg) != IPMI_KCS_ERROR_STATE) { - ik->waiting_rsp++; /* Invalidate the message */ - ik->outmsg[0] = IPMI_KCS_STATUS_ABORTED_ERR; - ik->outlen = 1; - ik->outpos = 0; - IPMI_KCS_SET_STATE(ik->status_reg, IPMI_KCS_ERROR_STATE); - SET_OBF(); - } - goto out; - } - - switch (IPMI_KCS_GET_STATE(ik->status_reg)) { - case IPMI_KCS_IDLE_STATE: - if (ik->cmd_reg == IPMI_KCS_WRITE_START_CMD) { - IPMI_KCS_SET_STATE(ik->status_reg, IPMI_KCS_WRITE_STATE); - ik->cmd_reg = -1; - ik->write_end = 0; - ik->inlen = 0; - SET_OBF(); - } - break; - - case IPMI_KCS_READ_STATE: - handle_read: - if (ik->outpos >= ik->outlen) { - IPMI_KCS_SET_STATE(ik->status_reg, IPMI_KCS_IDLE_STATE); - SET_OBF(); - } else if (ik->data_in_reg == IPMI_KCS_READ_CMD) { - ik->data_out_reg = ik->outmsg[ik->outpos]; - ik->outpos++; - SET_OBF(); - } else { - ik->outmsg[0] = IPMI_KCS_STATUS_BAD_CC_ERR; - ik->outlen = 1; - ik->outpos = 0; - IPMI_KCS_SET_STATE(ik->status_reg, IPMI_KCS_ERROR_STATE); - SET_OBF(); - goto out; - } - break; - - case IPMI_KCS_WRITE_STATE: - if (ik->data_in_reg != -1) { - /* - * Don't worry about input overrun here, that will be - * handled in the BMC. - */ - if (ik->inlen < sizeof(ik->inmsg)) { - ik->inmsg[ik->inlen] = ik->data_in_reg; - } - ik->inlen++; - } - if (ik->write_end) { - IPMIBmcClass *bk = IPMI_BMC_GET_CLASS(ik->bmc); - ik->outlen = 0; - ik->write_end = 0; - ik->outpos = 0; - bk->handle_command(ik->bmc, ik->inmsg, ik->inlen, sizeof(ik->inmsg), - ik->waiting_rsp); - goto out_noibf; - } else if (ik->cmd_reg == IPMI_KCS_WRITE_END_CMD) { - ik->cmd_reg = -1; - ik->write_end = 1; - } - SET_OBF(); - break; - - case IPMI_KCS_ERROR_STATE: - if (ik->data_in_reg != -1) { - IPMI_KCS_SET_STATE(ik->status_reg, IPMI_KCS_READ_STATE); - ik->data_in_reg = IPMI_KCS_READ_CMD; - goto handle_read; - } - break; - } - - if (ik->cmd_reg != -1) { - /* Got an invalid command */ - ik->outmsg[0] = IPMI_KCS_STATUS_BAD_CC_ERR; - ik->outlen = 1; - ik->outpos = 0; - IPMI_KCS_SET_STATE(ik->status_reg, IPMI_KCS_ERROR_STATE); - } - - out: - ik->cmd_reg = -1; - ik->data_in_reg = -1; - IPMI_KCS_SET_IBF(ik->status_reg, 0); - out_noibf: - return; -} - -static void ipmi_kcs_handle_rsp(IPMIInterface *ii, uint8_t msg_id, - unsigned char *rsp, unsigned int rsp_len) -{ - IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii); - IPMIKCS *ik = iic->get_backend_data(ii); - - if (ik->waiting_rsp == msg_id) { - ik->waiting_rsp++; - if (rsp_len > sizeof(ik->outmsg)) { - ik->outmsg[0] = rsp[0]; - ik->outmsg[1] = rsp[1]; - ik->outmsg[2] = IPMI_CC_CANNOT_RETURN_REQ_NUM_BYTES; - ik->outlen = 3; - } else { - memcpy(ik->outmsg, rsp, rsp_len); - ik->outlen = rsp_len; - } - IPMI_KCS_SET_STATE(ik->status_reg, IPMI_KCS_READ_STATE); - ik->data_in_reg = IPMI_KCS_READ_CMD; - ipmi_kcs_signal(ik, ii); - } -} - - -static uint64_t ipmi_kcs_ioport_read(void *opaque, hwaddr addr, unsigned size) -{ - IPMIInterface *ii = opaque; - IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii); - IPMIKCS *ik = iic->get_backend_data(ii); - uint32_t ret; - - switch (addr & 1) { - case 0: - ret = ik->data_out_reg; - IPMI_KCS_SET_OBF(ik->status_reg, 0); - if (ik->obf_irq_set) { - ik->obf_irq_set = 0; - if (!ik->atn_irq_set) { - qemu_irq_lower(ik->irq); - } - } - break; - case 1: - ret = ik->status_reg; - if (ik->atn_irq_set) { - ik->atn_irq_set = 0; - if (!ik->obf_irq_set) { - qemu_irq_lower(ik->irq); - } - } - break; - } - return ret; -} - -static void ipmi_kcs_ioport_write(void *opaque, hwaddr addr, uint64_t val, - unsigned size) -{ - IPMIInterface *ii = opaque; - IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii); - IPMIKCS *ik = iic->get_backend_data(ii); - - if (IPMI_KCS_GET_IBF(ik->status_reg)) { - return; - } - - switch (addr & 1) { - case 0: - ik->data_in_reg = val; - break; - - case 1: - ik->cmd_reg = val; - break; - } - IPMI_KCS_SET_IBF(ik->status_reg, 1); - ipmi_kcs_signal(ik, ii); -} - -const MemoryRegionOps ipmi_kcs_io_ops = { - .read = ipmi_kcs_ioport_read, - .write = ipmi_kcs_ioport_write, - .impl = { - .min_access_size = 1, - .max_access_size = 1, - }, - .endianness = DEVICE_LITTLE_ENDIAN, -}; - -static void ipmi_kcs_set_atn(IPMIInterface *ii, int val, int irq) -{ - IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii); - IPMIKCS *ik = iic->get_backend_data(ii); - - IPMI_KCS_SET_SMS_ATN(ik->status_reg, val); - if (val) { - if (irq && !ik->atn_irq_set && ik->use_irq && ik->irqs_enabled) { - ik->atn_irq_set = 1; - if (!ik->obf_irq_set) { - qemu_irq_raise(ik->irq); - } - } - } else { - if (ik->atn_irq_set) { - ik->atn_irq_set = 0; - if (!ik->obf_irq_set) { - qemu_irq_lower(ik->irq); - } - } - } -} - -static void ipmi_kcs_set_irq_enable(IPMIInterface *ii, int val) -{ - IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii); - IPMIKCS *ik = iic->get_backend_data(ii); - - ik->irqs_enabled = val; -} - -static void ipmi_kcs_init(IPMIInterface *ii, Error **errp) -{ - IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii); - IPMIKCS *ik = iic->get_backend_data(ii); - - ik->io_length = 2; - memory_region_init_io(&ik->io, NULL, &ipmi_kcs_io_ops, ii, "ipmi-kcs", 2); -} - #define TYPE_ISA_IPMI_KCS "isa-ipmi-kcs" #define ISA_IPMI_KCS(obj) OBJECT_CHECK(ISAIPMIKCSDevice, (obj), \ TYPE_ISA_IPMI_KCS) @@ -365,36 +39,32 @@ static void ipmi_kcs_init(IPMIInterface *ii, Error **errp) typedef struct ISAIPMIKCSDevice { ISADevice dev; int32_t isairq; + qemu_irq irq; IPMIKCS kcs; uint32_t uuid; } ISAIPMIKCSDevice; -static void ipmi_kcs_get_fwinfo(IPMIInterface *ii, IPMIFwInfo *info) +static void isa_ipmi_kcs_get_fwinfo(IPMIInterface *ii, IPMIFwInfo *info) { ISAIPMIKCSDevice *iik = ISA_IPMI_KCS(ii); - info->interface_name = "kcs"; - info->interface_type = IPMI_SMBIOS_KCS; - info->ipmi_spec_major_revision = 2; - info->ipmi_spec_minor_revision = 0; - info->base_address = iik->kcs.io_base; - info->i2c_slave_address = iik->kcs.bmc->slave_addr; - info->register_length = iik->kcs.io_length; - info->register_spacing = 1; - info->memspace = IPMI_MEMSPACE_IO; - info->irq_type = IPMI_LEVEL_IRQ; + ipmi_kcs_get_fwinfo(&iik->kcs, info); info->interrupt_number = iik->isairq; info->uuid = iik->uuid; } -static void ipmi_kcs_class_init(IPMIInterfaceClass *iic) +static void isa_ipmi_kcs_raise_irq(IPMIKCS *ik) { - iic->init = ipmi_kcs_init; - iic->set_atn = ipmi_kcs_set_atn; - iic->handle_rsp = ipmi_kcs_handle_rsp; - iic->handle_if_event = ipmi_kcs_handle_event; - iic->set_irq_enable = ipmi_kcs_set_irq_enable; - iic->get_fwinfo = ipmi_kcs_get_fwinfo; + ISAIPMIKCSDevice *iik = ik->opaque; + + qemu_irq_raise(iik->irq); +} + +static void isa_ipmi_kcs_lower_irq(IPMIKCS *ik) +{ + ISAIPMIKCSDevice *iik = ik->opaque; + + qemu_irq_lower(iik->irq); } static void ipmi_isa_realize(DeviceState *dev, Error **errp) @@ -412,14 +82,17 @@ static void ipmi_isa_realize(DeviceState *dev, Error **errp) iik->uuid = ipmi_next_uuid(); iik->kcs.bmc->intf = ii; + iik->kcs.opaque = iik; iic->init(ii, errp); if (*errp) return; if (iik->isairq > 0) { - isa_init_irq(isadev, &iik->kcs.irq, iik->isairq); + isa_init_irq(isadev, &iik->irq, iik->isairq); iik->kcs.use_irq = 1; + iik->kcs.raise_irq = isa_ipmi_kcs_raise_irq; + iik->kcs.lower_irq = isa_ipmi_kcs_lower_irq; } qdev_set_legacy_instance_id(dev, iik->kcs.io_base, iik->kcs.io_length); @@ -427,60 +100,11 @@ static void ipmi_isa_realize(DeviceState *dev, Error **errp) isa_register_ioport(isadev, &iik->kcs.io, iik->kcs.io_base); } -static int ipmi_kcs_vmstate_post_load(void *opaque, int version) -{ - IPMIKCS *ik = opaque; - - /* Make sure all the values are sane. */ - if (ik->outpos >= MAX_IPMI_MSG_SIZE || ik->outlen >= MAX_IPMI_MSG_SIZE || - ik->outpos >= ik->outlen) { - qemu_log_mask(LOG_GUEST_ERROR, - "ipmi:kcs: vmstate transfer received bad out values: %d %d\n", - ik->outpos, ik->outlen); - ik->outpos = 0; - ik->outlen = 0; - } - - if (ik->inlen >= MAX_IPMI_MSG_SIZE) { - qemu_log_mask(LOG_GUEST_ERROR, - "ipmi:kcs: vmstate transfer received bad in value: %d\n", - ik->inlen); - ik->inlen = 0; - } - - return 0; -} - static bool vmstate_kcs_before_version2(void *opaque, int version) { return version <= 1; } -static const VMStateDescription vmstate_IPMIKCS = { - .name = TYPE_IPMI_INTERFACE_PREFIX "kcs", - .version_id = 2, - .minimum_version_id = 1, - .post_load = ipmi_kcs_vmstate_post_load, - .fields = (VMStateField[]) { - VMSTATE_BOOL(obf_irq_set, IPMIKCS), - VMSTATE_BOOL(atn_irq_set, IPMIKCS), - VMSTATE_UNUSED_TEST(vmstate_kcs_before_version2, 1), /* Was use_irq */ - VMSTATE_BOOL(irqs_enabled, IPMIKCS), - VMSTATE_UINT32(outpos, IPMIKCS), - VMSTATE_UINT32_V(outlen, IPMIKCS, 2), - VMSTATE_UINT8_ARRAY(outmsg, IPMIKCS, MAX_IPMI_MSG_SIZE), - VMSTATE_UINT32_V(inlen, IPMIKCS, 2), - VMSTATE_UINT8_ARRAY(inmsg, IPMIKCS, MAX_IPMI_MSG_SIZE), - VMSTATE_BOOL(write_end, IPMIKCS), - VMSTATE_UINT8(status_reg, IPMIKCS), - VMSTATE_UINT8(data_out_reg, IPMIKCS), - VMSTATE_INT16(data_in_reg, IPMIKCS), - VMSTATE_INT16(cmd_reg, IPMIKCS), - VMSTATE_UINT8(waiting_rsp, IPMIKCS), - VMSTATE_END_OF_LIST() - } -}; - static const VMStateDescription vmstate_ISAIPMIKCSDevice = { .name = TYPE_IPMI_INTERFACE, .version_id = 2, @@ -531,6 +155,7 @@ static void isa_ipmi_kcs_class_init(ObjectClass *oc, void *data) iic->get_backend_data = isa_ipmi_kcs_get_backend_data; ipmi_kcs_class_init(iic); + iic->get_fwinfo = isa_ipmi_kcs_get_fwinfo; } static const TypeInfo isa_ipmi_kcs_info = { diff --git a/include/hw/ipmi/ipmi_kcs.h b/include/hw/ipmi/ipmi_kcs.h new file mode 100644 index 0000000000..91d76d08f4 --- /dev/null +++ b/include/hw/ipmi/ipmi_kcs.h @@ -0,0 +1,75 @@ +/* + * QEMU IPMI KCS emulation + * + * Copyright (c) 2015,2017 Corey Minyard, MontaVista Software, LLC + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef HW_IPMI_KCS_H +#define HW_IPMI_KCS_H + +#include "hw/ipmi/ipmi.h" + +typedef struct IPMIKCS { + IPMIBmc *bmc; + + bool do_wake; + + bool obf_irq_set; + bool atn_irq_set; + bool irqs_enabled; + + uint8_t outmsg[MAX_IPMI_MSG_SIZE]; + uint32_t outpos; + uint32_t outlen; + + uint8_t inmsg[MAX_IPMI_MSG_SIZE]; + uint32_t inlen; + bool write_end; + + uint8_t status_reg; + uint8_t data_out_reg; + + int16_t data_in_reg; /* -1 means not written */ + int16_t cmd_reg; + + /* + * This is a response number that we send with the command to make + * sure that the response matches the command. + */ + uint8_t waiting_rsp; + + uint32_t io_base; + unsigned long io_length; + MemoryRegion io; + + void (*raise_irq)(struct IPMIKCS *ik); + void (*lower_irq)(struct IPMIKCS *ik); + void *opaque; + + bool use_irq; +} IPMIKCS; + +void ipmi_kcs_get_fwinfo(IPMIKCS *ik, IPMIFwInfo *info); +void ipmi_kcs_class_init(IPMIInterfaceClass *iic); +extern const VMStateDescription vmstate_IPMIKCS; +int ipmi_kcs_vmstate_post_load(void *opaque, int version); + +#endif /* HW_IPMI_KCS_H */ -- cgit v1.2.3-55-g7522 From 1739d54c8bea120897e6170a3807ab8633c6d460 Mon Sep 17 00:00:00 2001 From: Corey Minyard Date: Wed, 6 Dec 2017 12:26:12 -0600 Subject: ipmi: Split out BT-specific code from ISA BT code Get ready for PCI and other BT interfaces. No functional changes, just split the code into generic BT code and ISA-specific BT code. Signed-off-by: Corey Minyard Reviewed-by: Philippe Mathieu-Daudé --- hw/ipmi/Makefile.objs | 2 +- hw/ipmi/ipmi_bt.c | 426 ++++++++++++++++++++++++++++++++++++++++++++ hw/ipmi/isa_ipmi_bt.c | 441 +++------------------------------------------- include/hw/ipmi/ipmi_bt.h | 72 ++++++++ 4 files changed, 520 insertions(+), 421 deletions(-) create mode 100644 hw/ipmi/ipmi_bt.c create mode 100644 include/hw/ipmi/ipmi_bt.h (limited to 'include') diff --git a/hw/ipmi/Makefile.objs b/hw/ipmi/Makefile.objs index 6835d2f64a..4ffa45a66c 100644 --- a/hw/ipmi/Makefile.objs +++ b/hw/ipmi/Makefile.objs @@ -1,4 +1,4 @@ -common-obj-$(CONFIG_IPMI) += ipmi.o ipmi_kcs.o +common-obj-$(CONFIG_IPMI) += ipmi.o ipmi_kcs.o ipmi_bt.o common-obj-$(CONFIG_IPMI_LOCAL) += ipmi_bmc_sim.o common-obj-$(CONFIG_IPMI_EXTERN) += ipmi_bmc_extern.o common-obj-$(CONFIG_ISA_IPMI_KCS) += isa_ipmi_kcs.o diff --git a/hw/ipmi/ipmi_bt.c b/hw/ipmi/ipmi_bt.c new file mode 100644 index 0000000000..e6765ca4f8 --- /dev/null +++ b/hw/ipmi/ipmi_bt.c @@ -0,0 +1,426 @@ +/* + * QEMU IPMI BT emulation + * + * Copyright (c) 2015 Corey Minyard, MontaVista Software, LLC + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#include "qemu/osdep.h" +#include "migration/vmstate.h" +#include "qemu/log.h" +#include "qapi/error.h" +#include "hw/ipmi/ipmi_bt.h" + +/* Control register */ +#define IPMI_BT_CLR_WR_BIT 0 +#define IPMI_BT_CLR_RD_BIT 1 +#define IPMI_BT_H2B_ATN_BIT 2 +#define IPMI_BT_B2H_ATN_BIT 3 +#define IPMI_BT_SMS_ATN_BIT 4 +#define IPMI_BT_HBUSY_BIT 6 +#define IPMI_BT_BBUSY_BIT 7 + +#define IPMI_BT_GET_CLR_WR(d) (((d) >> IPMI_BT_CLR_WR_BIT) & 0x1) + +#define IPMI_BT_GET_CLR_RD(d) (((d) >> IPMI_BT_CLR_RD_BIT) & 0x1) + +#define IPMI_BT_GET_H2B_ATN(d) (((d) >> IPMI_BT_H2B_ATN_BIT) & 0x1) + +#define IPMI_BT_B2H_ATN_MASK (1 << IPMI_BT_B2H_ATN_BIT) +#define IPMI_BT_GET_B2H_ATN(d) (((d) >> IPMI_BT_B2H_ATN_BIT) & 0x1) +#define IPMI_BT_SET_B2H_ATN(d, v) ((d) = (((d) & ~IPMI_BT_B2H_ATN_MASK) | \ + (!!(v) << IPMI_BT_B2H_ATN_BIT))) + +#define IPMI_BT_SMS_ATN_MASK (1 << IPMI_BT_SMS_ATN_BIT) +#define IPMI_BT_GET_SMS_ATN(d) (((d) >> IPMI_BT_SMS_ATN_BIT) & 0x1) +#define IPMI_BT_SET_SMS_ATN(d, v) ((d) = (((d) & ~IPMI_BT_SMS_ATN_MASK) | \ + (!!(v) << IPMI_BT_SMS_ATN_BIT))) + +#define IPMI_BT_HBUSY_MASK (1 << IPMI_BT_HBUSY_BIT) +#define IPMI_BT_GET_HBUSY(d) (((d) >> IPMI_BT_HBUSY_BIT) & 0x1) +#define IPMI_BT_SET_HBUSY(d, v) ((d) = (((d) & ~IPMI_BT_HBUSY_MASK) | \ + (!!(v) << IPMI_BT_HBUSY_BIT))) + +#define IPMI_BT_BBUSY_MASK (1 << IPMI_BT_BBUSY_BIT) +#define IPMI_BT_SET_BBUSY(d, v) ((d) = (((d) & ~IPMI_BT_BBUSY_MASK) | \ + (!!(v) << IPMI_BT_BBUSY_BIT))) + + +/* Mask register */ +#define IPMI_BT_B2H_IRQ_EN_BIT 0 +#define IPMI_BT_B2H_IRQ_BIT 1 + +#define IPMI_BT_B2H_IRQ_EN_MASK (1 << IPMI_BT_B2H_IRQ_EN_BIT) +#define IPMI_BT_GET_B2H_IRQ_EN(d) (((d) >> IPMI_BT_B2H_IRQ_EN_BIT) & 0x1) +#define IPMI_BT_SET_B2H_IRQ_EN(d, v) ((d) = (((d) & ~IPMI_BT_B2H_IRQ_EN_MASK) |\ + (!!(v) << IPMI_BT_B2H_IRQ_EN_BIT))) + +#define IPMI_BT_B2H_IRQ_MASK (1 << IPMI_BT_B2H_IRQ_BIT) +#define IPMI_BT_GET_B2H_IRQ(d) (((d) >> IPMI_BT_B2H_IRQ_BIT) & 0x1) +#define IPMI_BT_SET_B2H_IRQ(d, v) ((d) = (((d) & ~IPMI_BT_B2H_IRQ_MASK) | \ + (!!(v) << IPMI_BT_B2H_IRQ_BIT))) + +#define IPMI_CMD_GET_BT_INTF_CAP 0x36 + +static void ipmi_bt_raise_irq(IPMIBT *ib) +{ + if (ib->use_irq && ib->irqs_enabled && ib->raise_irq) { + ib->raise_irq(ib); + } +} + +static void ipmi_bt_lower_irq(IPMIBT *ib) +{ + if (ib->lower_irq) { + ib->lower_irq(ib); + } +} + +static void ipmi_bt_handle_event(IPMIInterface *ii) +{ + IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii); + IPMIBT *ib = iic->get_backend_data(ii); + + if (ib->inlen < 4) { + goto out; + } + /* Note that overruns are handled by handle_command */ + if (ib->inmsg[0] != (ib->inlen - 1)) { + /* Length mismatch, just ignore. */ + IPMI_BT_SET_BBUSY(ib->control_reg, 1); + ib->inlen = 0; + goto out; + } + if ((ib->inmsg[1] == (IPMI_NETFN_APP << 2)) && + (ib->inmsg[3] == IPMI_CMD_GET_BT_INTF_CAP)) { + /* We handle this one ourselves. */ + ib->outmsg[0] = 9; + ib->outmsg[1] = ib->inmsg[1] | 0x04; + ib->outmsg[2] = ib->inmsg[2]; + ib->outmsg[3] = ib->inmsg[3]; + ib->outmsg[4] = 0; + ib->outmsg[5] = 1; /* Only support 1 outstanding request. */ + if (sizeof(ib->inmsg) > 0xff) { /* Input buffer size */ + ib->outmsg[6] = 0xff; + } else { + ib->outmsg[6] = (unsigned char) sizeof(ib->inmsg); + } + if (sizeof(ib->outmsg) > 0xff) { /* Output buffer size */ + ib->outmsg[7] = 0xff; + } else { + ib->outmsg[7] = (unsigned char) sizeof(ib->outmsg); + } + ib->outmsg[8] = 10; /* Max request to response time */ + ib->outmsg[9] = 0; /* Don't recommend retries */ + ib->outlen = 10; + IPMI_BT_SET_BBUSY(ib->control_reg, 0); + IPMI_BT_SET_B2H_ATN(ib->control_reg, 1); + if (!IPMI_BT_GET_B2H_IRQ(ib->mask_reg) && + IPMI_BT_GET_B2H_IRQ_EN(ib->mask_reg)) { + IPMI_BT_SET_B2H_IRQ(ib->mask_reg, 1); + ipmi_bt_raise_irq(ib); + } + goto out; + } + ib->waiting_seq = ib->inmsg[2]; + ib->inmsg[2] = ib->inmsg[1]; + { + IPMIBmcClass *bk = IPMI_BMC_GET_CLASS(ib->bmc); + bk->handle_command(ib->bmc, ib->inmsg + 2, ib->inlen - 2, + sizeof(ib->inmsg), ib->waiting_rsp); + } + out: + return; +} + +static void ipmi_bt_handle_rsp(IPMIInterface *ii, uint8_t msg_id, + unsigned char *rsp, unsigned int rsp_len) +{ + IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii); + IPMIBT *ib = iic->get_backend_data(ii); + + if (ib->waiting_rsp == msg_id) { + ib->waiting_rsp++; + if (rsp_len > (sizeof(ib->outmsg) - 2)) { + ib->outmsg[0] = 4; + ib->outmsg[1] = rsp[0]; + ib->outmsg[2] = ib->waiting_seq; + ib->outmsg[3] = rsp[1]; + ib->outmsg[4] = IPMI_CC_CANNOT_RETURN_REQ_NUM_BYTES; + ib->outlen = 5; + } else { + ib->outmsg[0] = rsp_len + 1; + ib->outmsg[1] = rsp[0]; + ib->outmsg[2] = ib->waiting_seq; + memcpy(ib->outmsg + 3, rsp + 1, rsp_len - 1); + ib->outlen = rsp_len + 2; + } + IPMI_BT_SET_BBUSY(ib->control_reg, 0); + IPMI_BT_SET_B2H_ATN(ib->control_reg, 1); + if (!IPMI_BT_GET_B2H_IRQ(ib->mask_reg) && + IPMI_BT_GET_B2H_IRQ_EN(ib->mask_reg)) { + IPMI_BT_SET_B2H_IRQ(ib->mask_reg, 1); + ipmi_bt_raise_irq(ib); + } + } +} + + +static uint64_t ipmi_bt_ioport_read(void *opaque, hwaddr addr, unsigned size) +{ + IPMIInterface *ii = opaque; + IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii); + IPMIBT *ib = iic->get_backend_data(ii); + uint32_t ret = 0xff; + + switch (addr & 3) { + case 0: + ret = ib->control_reg; + break; + case 1: + if (ib->outpos < ib->outlen) { + ret = ib->outmsg[ib->outpos]; + ib->outpos++; + if (ib->outpos == ib->outlen) { + ib->outpos = 0; + ib->outlen = 0; + } + } else { + ret = 0xff; + } + break; + case 2: + ret = ib->mask_reg; + break; + } + return ret; +} + +static void ipmi_bt_signal(IPMIBT *ib, IPMIInterface *ii) +{ + IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii); + + ib->do_wake = 1; + while (ib->do_wake) { + ib->do_wake = 0; + iic->handle_if_event(ii); + } +} + +static void ipmi_bt_ioport_write(void *opaque, hwaddr addr, uint64_t val, + unsigned size) +{ + IPMIInterface *ii = opaque; + IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii); + IPMIBT *ib = iic->get_backend_data(ii); + + switch (addr & 3) { + case 0: + if (IPMI_BT_GET_CLR_WR(val)) { + ib->inlen = 0; + } + if (IPMI_BT_GET_CLR_RD(val)) { + ib->outpos = 0; + } + if (IPMI_BT_GET_B2H_ATN(val)) { + IPMI_BT_SET_B2H_ATN(ib->control_reg, 0); + } + if (IPMI_BT_GET_SMS_ATN(val)) { + IPMI_BT_SET_SMS_ATN(ib->control_reg, 0); + } + if (IPMI_BT_GET_HBUSY(val)) { + /* Toggle */ + IPMI_BT_SET_HBUSY(ib->control_reg, + !IPMI_BT_GET_HBUSY(ib->control_reg)); + } + if (IPMI_BT_GET_H2B_ATN(val)) { + IPMI_BT_SET_BBUSY(ib->control_reg, 1); + ipmi_bt_signal(ib, ii); + } + break; + + case 1: + if (ib->inlen < sizeof(ib->inmsg)) { + ib->inmsg[ib->inlen] = val; + } + ib->inlen++; + break; + + case 2: + if (IPMI_BT_GET_B2H_IRQ_EN(val) != + IPMI_BT_GET_B2H_IRQ_EN(ib->mask_reg)) { + if (IPMI_BT_GET_B2H_IRQ_EN(val)) { + if (IPMI_BT_GET_B2H_ATN(ib->control_reg) || + IPMI_BT_GET_SMS_ATN(ib->control_reg)) { + IPMI_BT_SET_B2H_IRQ(ib->mask_reg, 1); + ipmi_bt_raise_irq(ib); + } + IPMI_BT_SET_B2H_IRQ_EN(ib->mask_reg, 1); + } else { + if (IPMI_BT_GET_B2H_IRQ(ib->mask_reg)) { + IPMI_BT_SET_B2H_IRQ(ib->mask_reg, 0); + ipmi_bt_lower_irq(ib); + } + IPMI_BT_SET_B2H_IRQ_EN(ib->mask_reg, 0); + } + } + if (IPMI_BT_GET_B2H_IRQ(val) && IPMI_BT_GET_B2H_IRQ(ib->mask_reg)) { + IPMI_BT_SET_B2H_IRQ(ib->mask_reg, 0); + ipmi_bt_lower_irq(ib); + } + break; + } +} + +static const MemoryRegionOps ipmi_bt_io_ops = { + .read = ipmi_bt_ioport_read, + .write = ipmi_bt_ioport_write, + .impl = { + .min_access_size = 1, + .max_access_size = 1, + }, + .endianness = DEVICE_LITTLE_ENDIAN, +}; + +static void ipmi_bt_set_atn(IPMIInterface *ii, int val, int irq) +{ + IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii); + IPMIBT *ib = iic->get_backend_data(ii); + + if (!!val == IPMI_BT_GET_SMS_ATN(ib->control_reg)) { + return; + } + + IPMI_BT_SET_SMS_ATN(ib->control_reg, val); + if (val) { + if (irq && !IPMI_BT_GET_B2H_ATN(ib->control_reg) && + IPMI_BT_GET_B2H_IRQ_EN(ib->mask_reg)) { + IPMI_BT_SET_B2H_IRQ(ib->mask_reg, 1); + ipmi_bt_raise_irq(ib); + } + } else { + if (!IPMI_BT_GET_B2H_ATN(ib->control_reg) && + IPMI_BT_GET_B2H_IRQ(ib->mask_reg)) { + IPMI_BT_SET_B2H_IRQ(ib->mask_reg, 0); + ipmi_bt_lower_irq(ib); + } + } +} + +static void ipmi_bt_handle_reset(IPMIInterface *ii, bool is_cold) +{ + IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii); + IPMIBT *ib = iic->get_backend_data(ii); + + if (is_cold) { + /* Disable the BT interrupt on reset */ + if (IPMI_BT_GET_B2H_IRQ(ib->mask_reg)) { + IPMI_BT_SET_B2H_IRQ(ib->mask_reg, 0); + ipmi_bt_lower_irq(ib); + } + IPMI_BT_SET_B2H_IRQ_EN(ib->mask_reg, 0); + } +} + +static void ipmi_bt_set_irq_enable(IPMIInterface *ii, int val) +{ + IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii); + IPMIBT *ib = iic->get_backend_data(ii); + + ib->irqs_enabled = val; +} + +static void ipmi_bt_init(IPMIInterface *ii, Error **errp) +{ + IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii); + IPMIBT *ib = iic->get_backend_data(ii); + + ib->io_length = 3; + + memory_region_init_io(&ib->io, NULL, &ipmi_bt_io_ops, ii, "ipmi-bt", 3); +} + +int ipmi_bt_vmstate_post_load(void *opaque, int version) +{ + IPMIBT *ib = opaque; + + /* Make sure all the values are sane. */ + if (ib->outpos >= MAX_IPMI_MSG_SIZE || ib->outlen >= MAX_IPMI_MSG_SIZE || + ib->outpos >= ib->outlen) { + qemu_log_mask(LOG_GUEST_ERROR, + "ipmi:bt: vmstate transfer received bad out values: %d %d\n", + ib->outpos, ib->outlen); + ib->outpos = 0; + ib->outlen = 0; + } + + if (ib->inlen >= MAX_IPMI_MSG_SIZE) { + qemu_log_mask(LOG_GUEST_ERROR, + "ipmi:bt: vmstate transfer received bad in value: %d\n", + ib->inlen); + ib->inlen = 0; + } + + return 0; +} + +const VMStateDescription vmstate_IPMIBT = { + .name = TYPE_IPMI_INTERFACE_PREFIX "bt", + .version_id = 1, + .minimum_version_id = 1, + .post_load = ipmi_bt_vmstate_post_load, + .fields = (VMStateField[]) { + VMSTATE_BOOL(obf_irq_set, IPMIBT), + VMSTATE_BOOL(atn_irq_set, IPMIBT), + VMSTATE_BOOL(irqs_enabled, IPMIBT), + VMSTATE_UINT32(outpos, IPMIBT), + VMSTATE_UINT32(outlen, IPMIBT), + VMSTATE_UINT8_ARRAY(outmsg, IPMIBT, MAX_IPMI_MSG_SIZE), + VMSTATE_UINT32(inlen, IPMIBT), + VMSTATE_UINT8_ARRAY(inmsg, IPMIBT, MAX_IPMI_MSG_SIZE), + VMSTATE_UINT8(control_reg, IPMIBT), + VMSTATE_UINT8(mask_reg, IPMIBT), + VMSTATE_UINT8(waiting_rsp, IPMIBT), + VMSTATE_UINT8(waiting_seq, IPMIBT), + VMSTATE_END_OF_LIST() + } +}; + +void ipmi_bt_get_fwinfo(struct IPMIBT *ib, IPMIFwInfo *info) +{ + info->interface_name = "bt"; + info->interface_type = IPMI_SMBIOS_BT; + info->ipmi_spec_major_revision = 2; + info->ipmi_spec_minor_revision = 0; + info->base_address = ib->io_base; + info->register_length = ib->io_length; + info->register_spacing = 1; + info->memspace = IPMI_MEMSPACE_IO; + info->irq_type = IPMI_LEVEL_IRQ; +} + +void ipmi_bt_class_init(IPMIInterfaceClass *iic) +{ + iic->init = ipmi_bt_init; + iic->set_atn = ipmi_bt_set_atn; + iic->handle_rsp = ipmi_bt_handle_rsp; + iic->handle_if_event = ipmi_bt_handle_event; + iic->set_irq_enable = ipmi_bt_set_irq_enable; + iic->reset = ipmi_bt_handle_reset; +} diff --git a/hw/ipmi/isa_ipmi_bt.c b/hw/ipmi/isa_ipmi_bt.c index a696096cbb..c102778712 100644 --- a/hw/ipmi/isa_ipmi_bt.c +++ b/hw/ipmi/isa_ipmi_bt.c @@ -26,403 +26,46 @@ #include "qemu/log.h" #include "qemu/module.h" #include "qapi/error.h" -#include "hw/ipmi/ipmi.h" #include "hw/irq.h" +#include "hw/ipmi/ipmi_bt.h" #include "hw/isa/isa.h" #include "hw/qdev-properties.h" #include "migration/vmstate.h" -/* Control register */ -#define IPMI_BT_CLR_WR_BIT 0 -#define IPMI_BT_CLR_RD_BIT 1 -#define IPMI_BT_H2B_ATN_BIT 2 -#define IPMI_BT_B2H_ATN_BIT 3 -#define IPMI_BT_SMS_ATN_BIT 4 -#define IPMI_BT_HBUSY_BIT 6 -#define IPMI_BT_BBUSY_BIT 7 - -#define IPMI_BT_GET_CLR_WR(d) (((d) >> IPMI_BT_CLR_WR_BIT) & 0x1) - -#define IPMI_BT_GET_CLR_RD(d) (((d) >> IPMI_BT_CLR_RD_BIT) & 0x1) - -#define IPMI_BT_GET_H2B_ATN(d) (((d) >> IPMI_BT_H2B_ATN_BIT) & 0x1) - -#define IPMI_BT_B2H_ATN_MASK (1 << IPMI_BT_B2H_ATN_BIT) -#define IPMI_BT_GET_B2H_ATN(d) (((d) >> IPMI_BT_B2H_ATN_BIT) & 0x1) -#define IPMI_BT_SET_B2H_ATN(d, v) ((d) = (((d) & ~IPMI_BT_B2H_ATN_MASK) | \ - (!!(v) << IPMI_BT_B2H_ATN_BIT))) - -#define IPMI_BT_SMS_ATN_MASK (1 << IPMI_BT_SMS_ATN_BIT) -#define IPMI_BT_GET_SMS_ATN(d) (((d) >> IPMI_BT_SMS_ATN_BIT) & 0x1) -#define IPMI_BT_SET_SMS_ATN(d, v) ((d) = (((d) & ~IPMI_BT_SMS_ATN_MASK) | \ - (!!(v) << IPMI_BT_SMS_ATN_BIT))) - -#define IPMI_BT_HBUSY_MASK (1 << IPMI_BT_HBUSY_BIT) -#define IPMI_BT_GET_HBUSY(d) (((d) >> IPMI_BT_HBUSY_BIT) & 0x1) -#define IPMI_BT_SET_HBUSY(d, v) ((d) = (((d) & ~IPMI_BT_HBUSY_MASK) | \ - (!!(v) << IPMI_BT_HBUSY_BIT))) - -#define IPMI_BT_BBUSY_MASK (1 << IPMI_BT_BBUSY_BIT) -#define IPMI_BT_SET_BBUSY(d, v) ((d) = (((d) & ~IPMI_BT_BBUSY_MASK) | \ - (!!(v) << IPMI_BT_BBUSY_BIT))) - - -/* Mask register */ -#define IPMI_BT_B2H_IRQ_EN_BIT 0 -#define IPMI_BT_B2H_IRQ_BIT 1 - -#define IPMI_BT_B2H_IRQ_EN_MASK (1 << IPMI_BT_B2H_IRQ_EN_BIT) -#define IPMI_BT_GET_B2H_IRQ_EN(d) (((d) >> IPMI_BT_B2H_IRQ_EN_BIT) & 0x1) -#define IPMI_BT_SET_B2H_IRQ_EN(d, v) ((d) = (((d) & ~IPMI_BT_B2H_IRQ_EN_MASK) |\ - (!!(v) << IPMI_BT_B2H_IRQ_EN_BIT))) - -#define IPMI_BT_B2H_IRQ_MASK (1 << IPMI_BT_B2H_IRQ_BIT) -#define IPMI_BT_GET_B2H_IRQ(d) (((d) >> IPMI_BT_B2H_IRQ_BIT) & 0x1) -#define IPMI_BT_SET_B2H_IRQ(d, v) ((d) = (((d) & ~IPMI_BT_B2H_IRQ_MASK) | \ - (!!(v) << IPMI_BT_B2H_IRQ_BIT))) - -typedef struct IPMIBT { - IPMIBmc *bmc; - - bool do_wake; - - qemu_irq irq; - - uint32_t io_base; - unsigned long io_length; - MemoryRegion io; - - bool obf_irq_set; - bool atn_irq_set; - bool use_irq; - bool irqs_enabled; - - uint8_t outmsg[MAX_IPMI_MSG_SIZE]; - uint32_t outpos; - uint32_t outlen; - - uint8_t inmsg[MAX_IPMI_MSG_SIZE]; - uint32_t inlen; - - uint8_t control_reg; - uint8_t mask_reg; - - /* - * This is a response number that we send with the command to make - * sure that the response matches the command. - */ - uint8_t waiting_rsp; - uint8_t waiting_seq; -} IPMIBT; - -#define IPMI_CMD_GET_BT_INTF_CAP 0x36 - -static void ipmi_bt_handle_event(IPMIInterface *ii) -{ - IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii); - IPMIBT *ib = iic->get_backend_data(ii); - - if (ib->inlen < 4) { - goto out; - } - /* Note that overruns are handled by handle_command */ - if (ib->inmsg[0] != (ib->inlen - 1)) { - /* Length mismatch, just ignore. */ - IPMI_BT_SET_BBUSY(ib->control_reg, 1); - ib->inlen = 0; - goto out; - } - if ((ib->inmsg[1] == (IPMI_NETFN_APP << 2)) && - (ib->inmsg[3] == IPMI_CMD_GET_BT_INTF_CAP)) { - /* We handle this one ourselves. */ - ib->outmsg[0] = 9; - ib->outmsg[1] = ib->inmsg[1] | 0x04; - ib->outmsg[2] = ib->inmsg[2]; - ib->outmsg[3] = ib->inmsg[3]; - ib->outmsg[4] = 0; - ib->outmsg[5] = 1; /* Only support 1 outstanding request. */ - if (sizeof(ib->inmsg) > 0xff) { /* Input buffer size */ - ib->outmsg[6] = 0xff; - } else { - ib->outmsg[6] = (unsigned char) sizeof(ib->inmsg); - } - if (sizeof(ib->outmsg) > 0xff) { /* Output buffer size */ - ib->outmsg[7] = 0xff; - } else { - ib->outmsg[7] = (unsigned char) sizeof(ib->outmsg); - } - ib->outmsg[8] = 10; /* Max request to response time */ - ib->outmsg[9] = 0; /* Don't recommend retries */ - ib->outlen = 10; - IPMI_BT_SET_BBUSY(ib->control_reg, 0); - IPMI_BT_SET_B2H_ATN(ib->control_reg, 1); - if (ib->use_irq && ib->irqs_enabled && - !IPMI_BT_GET_B2H_IRQ(ib->mask_reg) && - IPMI_BT_GET_B2H_IRQ_EN(ib->mask_reg)) { - IPMI_BT_SET_B2H_IRQ(ib->mask_reg, 1); - qemu_irq_raise(ib->irq); - } - goto out; - } - ib->waiting_seq = ib->inmsg[2]; - ib->inmsg[2] = ib->inmsg[1]; - { - IPMIBmcClass *bk = IPMI_BMC_GET_CLASS(ib->bmc); - bk->handle_command(ib->bmc, ib->inmsg + 2, ib->inlen - 2, - sizeof(ib->inmsg), ib->waiting_rsp); - } - out: - return; -} - -static void ipmi_bt_handle_rsp(IPMIInterface *ii, uint8_t msg_id, - unsigned char *rsp, unsigned int rsp_len) -{ - IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii); - IPMIBT *ib = iic->get_backend_data(ii); - - if (ib->waiting_rsp == msg_id) { - ib->waiting_rsp++; - if (rsp_len > (sizeof(ib->outmsg) - 2)) { - ib->outmsg[0] = 4; - ib->outmsg[1] = rsp[0]; - ib->outmsg[2] = ib->waiting_seq; - ib->outmsg[3] = rsp[1]; - ib->outmsg[4] = IPMI_CC_CANNOT_RETURN_REQ_NUM_BYTES; - ib->outlen = 5; - } else { - ib->outmsg[0] = rsp_len + 1; - ib->outmsg[1] = rsp[0]; - ib->outmsg[2] = ib->waiting_seq; - memcpy(ib->outmsg + 3, rsp + 1, rsp_len - 1); - ib->outlen = rsp_len + 2; - } - IPMI_BT_SET_BBUSY(ib->control_reg, 0); - IPMI_BT_SET_B2H_ATN(ib->control_reg, 1); - if (ib->use_irq && ib->irqs_enabled && - !IPMI_BT_GET_B2H_IRQ(ib->mask_reg) && - IPMI_BT_GET_B2H_IRQ_EN(ib->mask_reg)) { - IPMI_BT_SET_B2H_IRQ(ib->mask_reg, 1); - qemu_irq_raise(ib->irq); - } - } -} - - -static uint64_t ipmi_bt_ioport_read(void *opaque, hwaddr addr, unsigned size) -{ - IPMIInterface *ii = opaque; - IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii); - IPMIBT *ib = iic->get_backend_data(ii); - uint32_t ret = 0xff; - - switch (addr & 3) { - case 0: - ret = ib->control_reg; - break; - case 1: - if (ib->outpos < ib->outlen) { - ret = ib->outmsg[ib->outpos]; - ib->outpos++; - if (ib->outpos == ib->outlen) { - ib->outpos = 0; - ib->outlen = 0; - } - } else { - ret = 0xff; - } - break; - case 2: - ret = ib->mask_reg; - break; - } - return ret; -} - -static void ipmi_bt_signal(IPMIBT *ib, IPMIInterface *ii) -{ - IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii); - - ib->do_wake = 1; - while (ib->do_wake) { - ib->do_wake = 0; - iic->handle_if_event(ii); - } -} - -static void ipmi_bt_ioport_write(void *opaque, hwaddr addr, uint64_t val, - unsigned size) -{ - IPMIInterface *ii = opaque; - IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii); - IPMIBT *ib = iic->get_backend_data(ii); - - switch (addr & 3) { - case 0: - if (IPMI_BT_GET_CLR_WR(val)) { - ib->inlen = 0; - } - if (IPMI_BT_GET_CLR_RD(val)) { - ib->outpos = 0; - } - if (IPMI_BT_GET_B2H_ATN(val)) { - IPMI_BT_SET_B2H_ATN(ib->control_reg, 0); - } - if (IPMI_BT_GET_SMS_ATN(val)) { - IPMI_BT_SET_SMS_ATN(ib->control_reg, 0); - } - if (IPMI_BT_GET_HBUSY(val)) { - /* Toggle */ - IPMI_BT_SET_HBUSY(ib->control_reg, - !IPMI_BT_GET_HBUSY(ib->control_reg)); - } - if (IPMI_BT_GET_H2B_ATN(val)) { - IPMI_BT_SET_BBUSY(ib->control_reg, 1); - ipmi_bt_signal(ib, ii); - } - break; - - case 1: - if (ib->inlen < sizeof(ib->inmsg)) { - ib->inmsg[ib->inlen] = val; - } - ib->inlen++; - break; - - case 2: - if (IPMI_BT_GET_B2H_IRQ_EN(val) != - IPMI_BT_GET_B2H_IRQ_EN(ib->mask_reg)) { - if (IPMI_BT_GET_B2H_IRQ_EN(val)) { - if (IPMI_BT_GET_B2H_ATN(ib->control_reg) || - IPMI_BT_GET_SMS_ATN(ib->control_reg)) { - IPMI_BT_SET_B2H_IRQ(ib->mask_reg, 1); - qemu_irq_raise(ib->irq); - } - IPMI_BT_SET_B2H_IRQ_EN(ib->mask_reg, 1); - } else { - if (IPMI_BT_GET_B2H_IRQ(ib->mask_reg)) { - IPMI_BT_SET_B2H_IRQ(ib->mask_reg, 0); - qemu_irq_lower(ib->irq); - } - IPMI_BT_SET_B2H_IRQ_EN(ib->mask_reg, 0); - } - } - if (IPMI_BT_GET_B2H_IRQ(val) && IPMI_BT_GET_B2H_IRQ(ib->mask_reg)) { - IPMI_BT_SET_B2H_IRQ(ib->mask_reg, 0); - qemu_irq_lower(ib->irq); - } - break; - } -} - -static const MemoryRegionOps ipmi_bt_io_ops = { - .read = ipmi_bt_ioport_read, - .write = ipmi_bt_ioport_write, - .impl = { - .min_access_size = 1, - .max_access_size = 1, - }, - .endianness = DEVICE_LITTLE_ENDIAN, -}; - -static void ipmi_bt_set_atn(IPMIInterface *ii, int val, int irq) -{ - IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii); - IPMIBT *ib = iic->get_backend_data(ii); - - if (!!val == IPMI_BT_GET_SMS_ATN(ib->control_reg)) { - return; - } - - IPMI_BT_SET_SMS_ATN(ib->control_reg, val); - if (val) { - if (irq && ib->use_irq && ib->irqs_enabled && - !IPMI_BT_GET_B2H_ATN(ib->control_reg) && - IPMI_BT_GET_B2H_IRQ_EN(ib->mask_reg)) { - IPMI_BT_SET_B2H_IRQ(ib->mask_reg, 1); - qemu_irq_raise(ib->irq); - } - } else { - if (!IPMI_BT_GET_B2H_ATN(ib->control_reg) && - IPMI_BT_GET_B2H_IRQ(ib->mask_reg)) { - IPMI_BT_SET_B2H_IRQ(ib->mask_reg, 0); - qemu_irq_lower(ib->irq); - } - } -} - -static void ipmi_bt_handle_reset(IPMIInterface *ii, bool is_cold) -{ - IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii); - IPMIBT *ib = iic->get_backend_data(ii); - - if (is_cold) { - /* Disable the BT interrupt on reset */ - if (IPMI_BT_GET_B2H_IRQ(ib->mask_reg)) { - IPMI_BT_SET_B2H_IRQ(ib->mask_reg, 0); - qemu_irq_lower(ib->irq); - } - IPMI_BT_SET_B2H_IRQ_EN(ib->mask_reg, 0); - } -} - -static void ipmi_bt_set_irq_enable(IPMIInterface *ii, int val) -{ - IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii); - IPMIBT *ib = iic->get_backend_data(ii); - - ib->irqs_enabled = val; -} - -static void ipmi_bt_init(IPMIInterface *ii, Error **errp) -{ - IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii); - IPMIBT *ib = iic->get_backend_data(ii); - - ib->io_length = 3; - - memory_region_init_io(&ib->io, NULL, &ipmi_bt_io_ops, ii, "ipmi-bt", 3); -} - - #define TYPE_ISA_IPMI_BT "isa-ipmi-bt" #define ISA_IPMI_BT(obj) OBJECT_CHECK(ISAIPMIBTDevice, (obj), \ - TYPE_ISA_IPMI_BT) + TYPE_ISA_IPMI_BT) typedef struct ISAIPMIBTDevice { ISADevice dev; int32_t isairq; + qemu_irq irq; IPMIBT bt; uint32_t uuid; } ISAIPMIBTDevice; -static void ipmi_bt_get_fwinfo(struct IPMIInterface *ii, IPMIFwInfo *info) +static void isa_ipmi_bt_get_fwinfo(struct IPMIInterface *ii, IPMIFwInfo *info) { ISAIPMIBTDevice *iib = ISA_IPMI_BT(ii); - info->interface_name = "bt"; - info->interface_type = IPMI_SMBIOS_BT; - info->ipmi_spec_major_revision = 2; - info->ipmi_spec_minor_revision = 0; - info->base_address = iib->bt.io_base; - info->register_length = iib->bt.io_length; - info->register_spacing = 1; - info->memspace = IPMI_MEMSPACE_IO; - info->irq_type = IPMI_LEVEL_IRQ; + ipmi_bt_get_fwinfo(&iib->bt, info); info->interrupt_number = iib->isairq; info->i2c_slave_address = iib->bt.bmc->slave_addr; info->uuid = iib->uuid; } -static void ipmi_bt_class_init(IPMIInterfaceClass *iic) +static void isa_ipmi_bt_raise_irq(IPMIBT *ib) { - iic->init = ipmi_bt_init; - iic->set_atn = ipmi_bt_set_atn; - iic->handle_rsp = ipmi_bt_handle_rsp; - iic->handle_if_event = ipmi_bt_handle_event; - iic->set_irq_enable = ipmi_bt_set_irq_enable; - iic->reset = ipmi_bt_handle_reset; - iic->get_fwinfo = ipmi_bt_get_fwinfo; + ISAIPMIBTDevice *iib = ib->opaque; + + qemu_irq_raise(iib->irq); +} + +static void isa_ipmi_bt_lower_irq(IPMIBT *ib) +{ + ISAIPMIBTDevice *iib = ib->opaque; + + qemu_irq_lower(iib->irq); } static void isa_ipmi_bt_realize(DeviceState *dev, Error **errp) @@ -440,14 +83,17 @@ static void isa_ipmi_bt_realize(DeviceState *dev, Error **errp) iib->uuid = ipmi_next_uuid(); iib->bt.bmc->intf = ii; + iib->bt.opaque = iib; iic->init(ii, errp); if (*errp) return; if (iib->isairq > 0) { - isa_init_irq(isadev, &iib->bt.irq, iib->isairq); + isa_init_irq(isadev, &iib->irq, iib->isairq); iib->bt.use_irq = 1; + iib->bt.raise_irq = isa_ipmi_bt_raise_irq; + iib->bt.lower_irq = isa_ipmi_bt_lower_irq; } qdev_set_legacy_instance_id(dev, iib->bt.io_base, iib->bt.io_length); @@ -455,52 +101,6 @@ static void isa_ipmi_bt_realize(DeviceState *dev, Error **errp) isa_register_ioport(isadev, &iib->bt.io, iib->bt.io_base); } -static int ipmi_bt_vmstate_post_load(void *opaque, int version) -{ - IPMIBT *ib = opaque; - - /* Make sure all the values are sane. */ - if (ib->outpos >= MAX_IPMI_MSG_SIZE || ib->outlen >= MAX_IPMI_MSG_SIZE || - ib->outpos >= ib->outlen) { - qemu_log_mask(LOG_GUEST_ERROR, - "ipmi:bt: vmstate transfer received bad out values: %d %d\n", - ib->outpos, ib->outlen); - ib->outpos = 0; - ib->outlen = 0; - } - - if (ib->inlen >= MAX_IPMI_MSG_SIZE) { - qemu_log_mask(LOG_GUEST_ERROR, - "ipmi:bt: vmstate transfer received bad in value: %d\n", - ib->inlen); - ib->inlen = 0; - } - - return 0; -} - -const VMStateDescription vmstate_IPMIBT = { - .name = TYPE_IPMI_INTERFACE_PREFIX "bt", - .version_id = 1, - .minimum_version_id = 1, - .post_load = ipmi_bt_vmstate_post_load, - .fields = (VMStateField[]) { - VMSTATE_BOOL(obf_irq_set, IPMIBT), - VMSTATE_BOOL(atn_irq_set, IPMIBT), - VMSTATE_BOOL(irqs_enabled, IPMIBT), - VMSTATE_UINT32(outpos, IPMIBT), - VMSTATE_UINT32(outlen, IPMIBT), - VMSTATE_UINT8_ARRAY(outmsg, IPMIBT, MAX_IPMI_MSG_SIZE), - VMSTATE_UINT32(inlen, IPMIBT), - VMSTATE_UINT8_ARRAY(inmsg, IPMIBT, MAX_IPMI_MSG_SIZE), - VMSTATE_UINT8(control_reg, IPMIBT), - VMSTATE_UINT8(mask_reg, IPMIBT), - VMSTATE_UINT8(waiting_rsp, IPMIBT), - VMSTATE_UINT8(waiting_seq, IPMIBT), - VMSTATE_END_OF_LIST() - } -}; - static const VMStateDescription vmstate_ISAIPMIBTDevice = { .name = TYPE_IPMI_INTERFACE_PREFIX "isa-bt", .version_id = 2, @@ -548,6 +148,7 @@ static void isa_ipmi_bt_class_init(ObjectClass *oc, void *data) iic->get_backend_data = isa_ipmi_bt_get_backend_data; ipmi_bt_class_init(iic); + iic->get_fwinfo = isa_ipmi_bt_get_fwinfo; } static const TypeInfo isa_ipmi_bt_info = { diff --git a/include/hw/ipmi/ipmi_bt.h b/include/hw/ipmi/ipmi_bt.h new file mode 100644 index 0000000000..9667aaa88a --- /dev/null +++ b/include/hw/ipmi/ipmi_bt.h @@ -0,0 +1,72 @@ +/* + * QEMU IPMI BT emulation + * + * Copyright (c) 2015 Corey Minyard, MontaVista Software, LLC + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef HW_IPMI_BT_H +#define HW_IPMI_BT_H + +#include "hw/ipmi/ipmi.h" + +typedef struct IPMIBT { + IPMIBmc *bmc; + + bool do_wake; + + bool obf_irq_set; + bool atn_irq_set; + bool irqs_enabled; + + uint8_t outmsg[MAX_IPMI_MSG_SIZE]; + uint32_t outpos; + uint32_t outlen; + + uint8_t inmsg[MAX_IPMI_MSG_SIZE]; + uint32_t inlen; + + uint8_t control_reg; + uint8_t mask_reg; + + /* + * This is a response number that we send with the command to make + * sure that the response matches the command. + */ + uint8_t waiting_rsp; + uint8_t waiting_seq; + + uint32_t io_base; + unsigned long io_length; + MemoryRegion io; + + void (*raise_irq)(struct IPMIBT *ib); + void (*lower_irq)(struct IPMIBT *ib); + void *opaque; + + bool use_irq; +} IPMIBT; + +void ipmi_bt_get_fwinfo(IPMIBT *ik, IPMIFwInfo *info); +void ipmi_bt_class_init(IPMIInterfaceClass *iic); +extern const VMStateDescription vmstate_IPMIBT; +int ipmi_bt_vmstate_post_load(void *opaque, int version); + +#endif /* HW_IPMI_BT_H */ -- cgit v1.2.3-55-g7522 From 79d29a9d065d25f7f9da0dfca8ac9b6f1989978c Mon Sep 17 00:00:00 2001 From: Corey Minyard Date: Wed, 6 Dec 2017 13:18:07 -0600 Subject: ipmi: Allow a size value to be passed for I/O space PCI device I/O must be >= 8 bytes in length or they don't work. Allow the size to be passed in, the default size of 2 or 3 won't work. Signed-off-by: Corey Minyard --- hw/ipmi/ipmi_bt.c | 19 +++++++++++++++---- hw/ipmi/ipmi_kcs.c | 23 +++++++++++++++++++---- hw/ipmi/isa_ipmi_bt.c | 2 +- hw/ipmi/isa_ipmi_kcs.c | 2 +- include/hw/ipmi/ipmi.h | 7 ++++++- include/hw/ipmi/ipmi_bt.h | 1 + include/hw/ipmi/ipmi_kcs.h | 1 + 7 files changed, 44 insertions(+), 11 deletions(-) (limited to 'include') diff --git a/hw/ipmi/ipmi_bt.c b/hw/ipmi/ipmi_bt.c index e6765ca4f8..22f94fb98d 100644 --- a/hw/ipmi/ipmi_bt.c +++ b/hw/ipmi/ipmi_bt.c @@ -189,7 +189,7 @@ static uint64_t ipmi_bt_ioport_read(void *opaque, hwaddr addr, unsigned size) IPMIBT *ib = iic->get_backend_data(ii); uint32_t ret = 0xff; - switch (addr & 3) { + switch (addr & ib->size_mask) { case 0: ret = ib->control_reg; break; @@ -208,6 +208,9 @@ static uint64_t ipmi_bt_ioport_read(void *opaque, hwaddr addr, unsigned size) case 2: ret = ib->mask_reg; break; + default: + ret = 0xff; + break; } return ret; } @@ -230,7 +233,7 @@ static void ipmi_bt_ioport_write(void *opaque, hwaddr addr, uint64_t val, IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii); IPMIBT *ib = iic->get_backend_data(ii); - switch (addr & 3) { + switch (addr & ib->size_mask) { case 0: if (IPMI_BT_GET_CLR_WR(val)) { ib->inlen = 0; @@ -285,6 +288,9 @@ static void ipmi_bt_ioport_write(void *opaque, hwaddr addr, uint64_t val, ipmi_bt_lower_irq(ib); } break; + default: + /* Ignore. */ + break; } } @@ -346,14 +352,19 @@ static void ipmi_bt_set_irq_enable(IPMIInterface *ii, int val) ib->irqs_enabled = val; } -static void ipmi_bt_init(IPMIInterface *ii, Error **errp) +static void ipmi_bt_init(IPMIInterface *ii, unsigned int min_size, Error **errp) { IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii); IPMIBT *ib = iic->get_backend_data(ii); + if (min_size == 0) { + min_size = 4; + } + ib->size_mask = min_size - 1; ib->io_length = 3; - memory_region_init_io(&ib->io, NULL, &ipmi_bt_io_ops, ii, "ipmi-bt", 3); + memory_region_init_io(&ib->io, NULL, &ipmi_bt_io_ops, ii, "ipmi-bt", + min_size); } int ipmi_bt_vmstate_post_load(void *opaque, int version) diff --git a/hw/ipmi/ipmi_kcs.c b/hw/ipmi/ipmi_kcs.c index dab1af8bc8..a77612946a 100644 --- a/hw/ipmi/ipmi_kcs.c +++ b/hw/ipmi/ipmi_kcs.c @@ -232,7 +232,7 @@ static uint64_t ipmi_kcs_ioport_read(void *opaque, hwaddr addr, unsigned size) IPMIKCS *ik = iic->get_backend_data(ii); uint32_t ret; - switch (addr & 1) { + switch (addr & ik->size_mask) { case 0: ret = ik->data_out_reg; IPMI_KCS_SET_OBF(ik->status_reg, 0); @@ -243,6 +243,7 @@ static uint64_t ipmi_kcs_ioport_read(void *opaque, hwaddr addr, unsigned size) } } break; + case 1: ret = ik->status_reg; if (ik->atn_irq_set) { @@ -252,6 +253,9 @@ static uint64_t ipmi_kcs_ioport_read(void *opaque, hwaddr addr, unsigned size) } } break; + + default: + ret = 0xff; } return ret; } @@ -267,7 +271,7 @@ static void ipmi_kcs_ioport_write(void *opaque, hwaddr addr, uint64_t val, return; } - switch (addr & 1) { + switch (addr & ik->size_mask) { case 0: ik->data_in_reg = val; break; @@ -275,6 +279,10 @@ static void ipmi_kcs_ioport_write(void *opaque, hwaddr addr, uint64_t val, case 1: ik->cmd_reg = val; break; + + default: + /* Ignore. */ + break; } IPMI_KCS_SET_IBF(ik->status_reg, 1); ipmi_kcs_signal(ik, ii); @@ -321,13 +329,20 @@ static void ipmi_kcs_set_irq_enable(IPMIInterface *ii, int val) ik->irqs_enabled = val; } -static void ipmi_kcs_init(IPMIInterface *ii, Error **errp) +/* min_size must be a power of 2. */ +static void ipmi_kcs_init(IPMIInterface *ii, unsigned int min_size, + Error **errp) { IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii); IPMIKCS *ik = iic->get_backend_data(ii); + if (min_size == 0) { + min_size = 2; + } + ik->size_mask = min_size - 1; ik->io_length = 2; - memory_region_init_io(&ik->io, NULL, &ipmi_kcs_io_ops, ii, "ipmi-kcs", 2); + memory_region_init_io(&ik->io, NULL, &ipmi_kcs_io_ops, ii, "ipmi-kcs", + min_size); } int ipmi_kcs_vmstate_post_load(void *opaque, int version) diff --git a/hw/ipmi/isa_ipmi_bt.c b/hw/ipmi/isa_ipmi_bt.c index c102778712..9a87ffd3f0 100644 --- a/hw/ipmi/isa_ipmi_bt.c +++ b/hw/ipmi/isa_ipmi_bt.c @@ -85,7 +85,7 @@ static void isa_ipmi_bt_realize(DeviceState *dev, Error **errp) iib->bt.bmc->intf = ii; iib->bt.opaque = iib; - iic->init(ii, errp); + iic->init(ii, 0, errp); if (*errp) return; diff --git a/hw/ipmi/isa_ipmi_kcs.c b/hw/ipmi/isa_ipmi_kcs.c index 8e32774f85..ca3ea36a3f 100644 --- a/hw/ipmi/isa_ipmi_kcs.c +++ b/hw/ipmi/isa_ipmi_kcs.c @@ -84,7 +84,7 @@ static void ipmi_isa_realize(DeviceState *dev, Error **errp) iik->kcs.bmc->intf = ii; iik->kcs.opaque = iik; - iic->init(ii, errp); + iic->init(ii, 0, errp); if (*errp) return; diff --git a/include/hw/ipmi/ipmi.h b/include/hw/ipmi/ipmi.h index 70871da0a7..6f2413b39b 100644 --- a/include/hw/ipmi/ipmi.h +++ b/include/hw/ipmi/ipmi.h @@ -118,7 +118,12 @@ typedef struct IPMIInterface IPMIInterface; typedef struct IPMIInterfaceClass { InterfaceClass parent; - void (*init)(struct IPMIInterface *s, Error **errp); + /* + * min_size is the requested I/O size and must be a power of 2. + * This is so PCI (or other busses) can request a bigger range. + * Use 0 for the default. + */ + void (*init)(struct IPMIInterface *s, unsigned int min_size, Error **errp); /* * Perform various operations on the hardware. If checkonly is diff --git a/include/hw/ipmi/ipmi_bt.h b/include/hw/ipmi/ipmi_bt.h index 9667aaa88a..8a4316ea7c 100644 --- a/include/hw/ipmi/ipmi_bt.h +++ b/include/hw/ipmi/ipmi_bt.h @@ -56,6 +56,7 @@ typedef struct IPMIBT { uint32_t io_base; unsigned long io_length; MemoryRegion io; + unsigned long size_mask; void (*raise_irq)(struct IPMIBT *ib); void (*lower_irq)(struct IPMIBT *ib); diff --git a/include/hw/ipmi/ipmi_kcs.h b/include/hw/ipmi/ipmi_kcs.h index 91d76d08f4..6e6ef4c539 100644 --- a/include/hw/ipmi/ipmi_kcs.h +++ b/include/hw/ipmi/ipmi_kcs.h @@ -59,6 +59,7 @@ typedef struct IPMIKCS { uint32_t io_base; unsigned long io_length; MemoryRegion io; + unsigned long size_mask; void (*raise_irq)(struct IPMIKCS *ik); void (*lower_irq)(struct IPMIKCS *ik); -- cgit v1.2.3-55-g7522 From 12f983c6aa165bc85ac061856cb3970d80ee25b4 Mon Sep 17 00:00:00 2001 From: Corey Minyard Date: Wed, 6 Dec 2017 13:36:21 -0600 Subject: ipmi: Add PCI IPMI interfaces Pretty straightforward, just hook the current KCS and BT code into the PCI system with the proper configuration. Cc: Michael S. Tsirkin Cc: M: Marcel Apfelbaum Signed-off-by: Corey Minyard --- default-configs/i386-softmmu.mak | 2 + hw/i386/Kconfig | 2 + hw/ipmi/Kconfig | 10 +++ hw/ipmi/Makefile.objs | 2 + hw/ipmi/pci_ipmi_bt.c | 146 +++++++++++++++++++++++++++++++++++++++ hw/ipmi/pci_ipmi_kcs.c | 146 +++++++++++++++++++++++++++++++++++++++ include/hw/pci/pci.h | 1 + 7 files changed, 309 insertions(+) create mode 100644 hw/ipmi/pci_ipmi_bt.c create mode 100644 hw/ipmi/pci_ipmi_kcs.c (limited to 'include') diff --git a/default-configs/i386-softmmu.mak b/default-configs/i386-softmmu.mak index ba3fb3ff50..2294c0be5a 100644 --- a/default-configs/i386-softmmu.mak +++ b/default-configs/i386-softmmu.mak @@ -10,6 +10,8 @@ #CONFIG_ISA_DEBUG=n #CONFIG_ISA_IPMI_BT=n #CONFIG_ISA_IPMI_KCS=n +#CONFIG_PCI_IPMI_KCS=n +#CONFIG_PCI_IPMI_BT=n #CONFIG_PCI_DEVICES=n #CONFIG_PVPANIC=n #CONFIG_QXL=n diff --git a/hw/i386/Kconfig b/hw/i386/Kconfig index c7a9d6315c..d10f4e3e8b 100644 --- a/hw/i386/Kconfig +++ b/hw/i386/Kconfig @@ -8,6 +8,8 @@ config PC imply HYPERV imply ISA_IPMI_KCS imply ISA_IPMI_BT + imply PCI_IPMI_KCS + imply PCI_IPMI_BT imply ISA_DEBUG imply PARALLEL imply PCI_DEVICES diff --git a/hw/ipmi/Kconfig b/hw/ipmi/Kconfig index b944fae100..12db4e81ad 100644 --- a/hw/ipmi/Kconfig +++ b/hw/ipmi/Kconfig @@ -20,3 +20,13 @@ config ISA_IPMI_BT bool depends on ISA_BUS select IPMI + +config PCI_IPMI_KCS + bool + depends on PCI + select IPMI + +config PCI_IPMI_BT + bool + depends on PCI + select IPMI diff --git a/hw/ipmi/Makefile.objs b/hw/ipmi/Makefile.objs index 4ffa45a66c..2d7f080a86 100644 --- a/hw/ipmi/Makefile.objs +++ b/hw/ipmi/Makefile.objs @@ -2,4 +2,6 @@ common-obj-$(CONFIG_IPMI) += ipmi.o ipmi_kcs.o ipmi_bt.o common-obj-$(CONFIG_IPMI_LOCAL) += ipmi_bmc_sim.o common-obj-$(CONFIG_IPMI_EXTERN) += ipmi_bmc_extern.o common-obj-$(CONFIG_ISA_IPMI_KCS) += isa_ipmi_kcs.o +common-obj-$(CONFIG_PCI_IPMI_KCS) += pci_ipmi_kcs.o common-obj-$(CONFIG_ISA_IPMI_BT) += isa_ipmi_bt.o +common-obj-$(CONFIG_PCI_IPMI_BT) += pci_ipmi_bt.o diff --git a/hw/ipmi/pci_ipmi_bt.c b/hw/ipmi/pci_ipmi_bt.c new file mode 100644 index 0000000000..6ed925a665 --- /dev/null +++ b/hw/ipmi/pci_ipmi_bt.c @@ -0,0 +1,146 @@ +/* + * QEMU PCI IPMI BT emulation + * + * Copyright (c) 2017 Corey Minyard, MontaVista Software, LLC + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#include "qemu/osdep.h" +#include "migration/vmstate.h" +#include "qapi/error.h" +#include "hw/ipmi/ipmi_bt.h" +#include "hw/pci/pci.h" + +#define TYPE_PCI_IPMI_BT "pci-ipmi-bt" +#define PCI_IPMI_BT(obj) OBJECT_CHECK(PCIIPMIBTDevice, (obj), \ + TYPE_PCI_IPMI_BT) + +typedef struct PCIIPMIBTDevice { + PCIDevice dev; + IPMIBT bt; + bool irq_enabled; + uint32_t uuid; +} PCIIPMIBTDevice; + +static void pci_ipmi_raise_irq(IPMIBT *ik) +{ + PCIIPMIBTDevice *pik = ik->opaque; + + pci_set_irq(&pik->dev, true); +} + +static void pci_ipmi_lower_irq(IPMIBT *ik) +{ + PCIIPMIBTDevice *pik = ik->opaque; + + pci_set_irq(&pik->dev, false); +} + +static void pci_ipmi_bt_realize(PCIDevice *pd, Error **errp) +{ + PCIIPMIBTDevice *pik = PCI_IPMI_BT(pd); + IPMIInterface *ii = IPMI_INTERFACE(pd); + IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii); + + if (!pik->bt.bmc) { + error_setg(errp, "IPMI device requires a bmc attribute to be set"); + return; + } + + pik->uuid = ipmi_next_uuid(); + + pik->bt.bmc->intf = ii; + pik->bt.opaque = pik; + + pci_config_set_prog_interface(pd->config, 0x02); /* BT */ + pci_config_set_interrupt_pin(pd->config, 0x01); + pik->bt.use_irq = 1; + pik->bt.raise_irq = pci_ipmi_raise_irq; + pik->bt.lower_irq = pci_ipmi_lower_irq; + + iic->init(ii, 8, errp); + if (*errp) { + return; + } + pci_register_bar(pd, 0, PCI_BASE_ADDRESS_SPACE_IO, &pik->bt.io); +} + +const VMStateDescription vmstate_PCIIPMIBTDevice = { + .name = TYPE_IPMI_INTERFACE_PREFIX "pci-bt", + .version_id = 1, + .minimum_version_id = 1, + .fields = (VMStateField[]) { + VMSTATE_PCI_DEVICE(dev, PCIIPMIBTDevice), + VMSTATE_STRUCT(bt, PCIIPMIBTDevice, 1, vmstate_IPMIBT, IPMIBT), + VMSTATE_END_OF_LIST() + } +}; + +static void pci_ipmi_bt_instance_init(Object *obj) +{ + PCIIPMIBTDevice *pik = PCI_IPMI_BT(obj); + + ipmi_bmc_find_and_link(obj, (Object **) &pik->bt.bmc); +} + +static void *pci_ipmi_bt_get_backend_data(IPMIInterface *ii) +{ + PCIIPMIBTDevice *pik = PCI_IPMI_BT(ii); + + return &pik->bt; +} + +static void pci_ipmi_bt_class_init(ObjectClass *oc, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(oc); + PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc); + IPMIInterfaceClass *iic = IPMI_INTERFACE_CLASS(oc); + + pdc->vendor_id = PCI_VENDOR_ID_QEMU; + pdc->device_id = PCI_DEVICE_ID_QEMU_IPMI; + pdc->revision = 1; + pdc->class_id = PCI_CLASS_SERIAL_IPMI; + + dc->vmsd = &vmstate_PCIIPMIBTDevice; + dc->desc = "PCI IPMI BT"; + pdc->realize = pci_ipmi_bt_realize; + + iic->get_backend_data = pci_ipmi_bt_get_backend_data; + ipmi_bt_class_init(iic); +} + +static const TypeInfo pci_ipmi_bt_info = { + .name = TYPE_PCI_IPMI_BT, + .parent = TYPE_PCI_DEVICE, + .instance_size = sizeof(PCIIPMIBTDevice), + .instance_init = pci_ipmi_bt_instance_init, + .class_init = pci_ipmi_bt_class_init, + .interfaces = (InterfaceInfo[]) { + { TYPE_IPMI_INTERFACE }, + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { } + } +}; + +static void pci_ipmi_bt_register_types(void) +{ + type_register_static(&pci_ipmi_bt_info); +} + +type_init(pci_ipmi_bt_register_types) diff --git a/hw/ipmi/pci_ipmi_kcs.c b/hw/ipmi/pci_ipmi_kcs.c new file mode 100644 index 0000000000..eeba63baa4 --- /dev/null +++ b/hw/ipmi/pci_ipmi_kcs.c @@ -0,0 +1,146 @@ +/* + * QEMU PCI IPMI KCS emulation + * + * Copyright (c) 2017 Corey Minyard, MontaVista Software, LLC + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#include "qemu/osdep.h" +#include "migration/vmstate.h" +#include "qapi/error.h" +#include "hw/ipmi/ipmi_kcs.h" +#include "hw/pci/pci.h" + +#define TYPE_PCI_IPMI_KCS "pci-ipmi-kcs" +#define PCI_IPMI_KCS(obj) OBJECT_CHECK(PCIIPMIKCSDevice, (obj), \ + TYPE_PCI_IPMI_KCS) + +typedef struct PCIIPMIKCSDevice { + PCIDevice dev; + IPMIKCS kcs; + bool irq_enabled; + uint32_t uuid; +} PCIIPMIKCSDevice; + +static void pci_ipmi_raise_irq(IPMIKCS *ik) +{ + PCIIPMIKCSDevice *pik = ik->opaque; + + pci_set_irq(&pik->dev, true); +} + +static void pci_ipmi_lower_irq(IPMIKCS *ik) +{ + PCIIPMIKCSDevice *pik = ik->opaque; + + pci_set_irq(&pik->dev, false); +} + +static void pci_ipmi_kcs_realize(PCIDevice *pd, Error **errp) +{ + PCIIPMIKCSDevice *pik = PCI_IPMI_KCS(pd); + IPMIInterface *ii = IPMI_INTERFACE(pd); + IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii); + + if (!pik->kcs.bmc) { + error_setg(errp, "IPMI device requires a bmc attribute to be set"); + return; + } + + pik->uuid = ipmi_next_uuid(); + + pik->kcs.bmc->intf = ii; + pik->kcs.opaque = pik; + + pci_config_set_prog_interface(pd->config, 0x01); /* KCS */ + pci_config_set_interrupt_pin(pd->config, 0x01); + pik->kcs.use_irq = 1; + pik->kcs.raise_irq = pci_ipmi_raise_irq; + pik->kcs.lower_irq = pci_ipmi_lower_irq; + + iic->init(ii, 8, errp); + if (*errp) { + return; + } + pci_register_bar(pd, 0, PCI_BASE_ADDRESS_SPACE_IO, &pik->kcs.io); +} + +const VMStateDescription vmstate_PCIIPMIKCSDevice = { + .name = TYPE_IPMI_INTERFACE_PREFIX "pci-kcs", + .version_id = 1, + .minimum_version_id = 1, + .fields = (VMStateField[]) { + VMSTATE_PCI_DEVICE(dev, PCIIPMIKCSDevice), + VMSTATE_STRUCT(kcs, PCIIPMIKCSDevice, 1, vmstate_IPMIKCS, IPMIKCS), + VMSTATE_END_OF_LIST() + } +}; + +static void pci_ipmi_kcs_instance_init(Object *obj) +{ + PCIIPMIKCSDevice *pik = PCI_IPMI_KCS(obj); + + ipmi_bmc_find_and_link(obj, (Object **) &pik->kcs.bmc); +} + +static void *pci_ipmi_kcs_get_backend_data(IPMIInterface *ii) +{ + PCIIPMIKCSDevice *pik = PCI_IPMI_KCS(ii); + + return &pik->kcs; +} + +static void pci_ipmi_kcs_class_init(ObjectClass *oc, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(oc); + PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc); + IPMIInterfaceClass *iic = IPMI_INTERFACE_CLASS(oc); + + pdc->vendor_id = PCI_VENDOR_ID_QEMU; + pdc->device_id = PCI_DEVICE_ID_QEMU_IPMI; + pdc->revision = 1; + pdc->class_id = PCI_CLASS_SERIAL_IPMI; + + dc->vmsd = &vmstate_PCIIPMIKCSDevice; + dc->desc = "PCI IPMI KCS"; + pdc->realize = pci_ipmi_kcs_realize; + + iic->get_backend_data = pci_ipmi_kcs_get_backend_data; + ipmi_kcs_class_init(iic); +} + +static const TypeInfo pci_ipmi_kcs_info = { + .name = TYPE_PCI_IPMI_KCS, + .parent = TYPE_PCI_DEVICE, + .instance_size = sizeof(PCIIPMIKCSDevice), + .instance_init = pci_ipmi_kcs_instance_init, + .class_init = pci_ipmi_kcs_class_init, + .interfaces = (InterfaceInfo[]) { + { TYPE_IPMI_INTERFACE }, + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { } + } +}; + +static void pci_ipmi_kcs_register_types(void) +{ + type_register_static(&pci_ipmi_kcs_info); +} + +type_init(pci_ipmi_kcs_register_types) diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index 1b840e61a2..f3f0ffd5fb 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -55,6 +55,7 @@ extern bool pci_available; /* QEMU/Bochs VGA (0x1234) */ #define PCI_VENDOR_ID_QEMU 0x1234 #define PCI_DEVICE_ID_QEMU_VGA 0x1111 +#define PCI_DEVICE_ID_QEMU_IPMI 0x1112 /* VMWare (0x15ad) */ #define PCI_VENDOR_ID_VMWARE 0x15ad -- cgit v1.2.3-55-g7522 From ef48a8ce411a93bd610776ee83164efc973f8094 Mon Sep 17 00:00:00 2001 From: Corey Minyard Date: Tue, 9 Jun 2015 15:12:35 -0500 Subject: acpi: Add i2c serial bus CRS handling This will be required for getting IPMI SSIF (SMBus interface) into the ACPI tables. Cc: Michael S. Tsirkin Cc: Igor Mammedov Signed-off-by: Corey Minyard --- hw/acpi/aml-build.c | 40 ++++++++++++++++++++++++++++++++++++++++ include/hw/acpi/aml-build.h | 18 ++++++++++++++++++ 2 files changed, 58 insertions(+) (limited to 'include') diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c index 78aee1a2f9..2c3702b882 100644 --- a/hw/acpi/aml-build.c +++ b/hw/acpi/aml-build.c @@ -1874,3 +1874,43 @@ build_hdr: build_header(linker, tbl, (void *)(tbl->data + fadt_start), "FACP", tbl->len - fadt_start, f->rev, oem_id, oem_table_id); } + +/* ACPI 5.0: 6.4.3.8.2 Serial Bus Connection Descriptors */ +static Aml *aml_serial_bus_device(uint8_t serial_bus_type, uint8_t flags, + uint16_t type_flags, + uint8_t revid, uint16_t data_length, + uint16_t resource_source_len) +{ + Aml *var = aml_alloc(); + uint16_t length = data_length + resource_source_len + 9; + + build_append_byte(var->buf, 0x8e); /* Serial Bus Connection Descriptor */ + build_append_int_noprefix(var->buf, length, sizeof(length)); + build_append_byte(var->buf, 1); /* Revision ID */ + build_append_byte(var->buf, 0); /* Resource Source Index */ + build_append_byte(var->buf, serial_bus_type); /* Serial Bus Type */ + build_append_byte(var->buf, flags); /* General Flags */ + build_append_int_noprefix(var->buf, type_flags, /* Type Specific Flags */ + sizeof(type_flags)); + build_append_byte(var->buf, revid); /* Type Specification Revision ID */ + build_append_int_noprefix(var->buf, data_length, sizeof(data_length)); + + return var; +} + +/* ACPI 5.0: 6.4.3.8.2.1 I2C Serial Bus Connection Resource Descriptor */ +Aml *aml_i2c_serial_bus_device(uint16_t address, const char *resource_source) +{ + uint16_t resource_source_len = strlen(resource_source) + 1; + Aml *var = aml_serial_bus_device(AML_SERIAL_BUS_TYPE_I2C, 0, 0, 1, + 6, resource_source_len); + + /* Connection Speed. Just set to 100K for now, it doesn't really matter. */ + build_append_int_noprefix(var->buf, 100000, 4); + build_append_int_noprefix(var->buf, address, sizeof(address)); + + /* This is a string, not a name, so just copy it directly in. */ + g_array_append_vals(var->buf, resource_source, resource_source_len); + + return var; +} diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h index 991cf05134..de4a406568 100644 --- a/include/hw/acpi/aml-build.h +++ b/include/hw/acpi/aml-build.h @@ -223,6 +223,23 @@ struct AcpiBuildTables { BIOSLinker *linker; } AcpiBuildTables; +/* + * ACPI 5.0: 6.4.3.8.2 Serial Bus Connection Descriptors + * Serial Bus Type + */ +#define AML_SERIAL_BUS_TYPE_I2C 1 +#define AML_SERIAL_BUS_TYPE_SPI 2 +#define AML_SERIAL_BUS_TYPE_UART 3 + +/* + * ACPI 5.0: 6.4.3.8.2 Serial Bus Connection Descriptors + * General Flags + */ +/* Slave Mode */ +#define AML_SERIAL_BUS_FLAG_MASTER_DEVICE (1 << 0) +/* Consumer/Producer */ +#define AML_SERIAL_BUS_FLAG_CONSUME_ONLY (1 << 1) + /** * init_aml_allocator: * @@ -347,6 +364,7 @@ Aml *aml_qword_memory(AmlDecode dec, AmlMinFixed min_fixed, Aml *aml_dma(AmlDmaType typ, AmlDmaBusMaster bm, AmlTransferSize sz, uint8_t channel); Aml *aml_sleep(uint64_t msec); +Aml *aml_i2c_serial_bus_device(uint16_t address, const char *resource_source); /* Block AML object primitives */ Aml *aml_scope(const char *name_format, ...) GCC_FMT_ATTR(1, 2); -- cgit v1.2.3-55-g7522 From 576d05b67fa0566cfb92da93c810a55a035548d0 Mon Sep 17 00:00:00 2001 From: Corey Minyard Date: Tue, 9 Jun 2015 15:13:29 -0500 Subject: ipmi: Fix SSIF ACPI handling to use the right CRS Pass in the CRS so that it can be set to the SMBus for IPMI later. Cc: Michael S. Tsirkin Cc: Igor Mammedov Signed-off-by: Corey Minyard --- hw/acpi/ipmi-stub.c | 2 +- hw/acpi/ipmi.c | 13 +++++++------ hw/i386/acpi-build.c | 2 +- include/hw/acpi/ipmi.h | 2 +- 4 files changed, 10 insertions(+), 9 deletions(-) (limited to 'include') diff --git a/hw/acpi/ipmi-stub.c b/hw/acpi/ipmi-stub.c index f525f71c2d..8634fb325c 100644 --- a/hw/acpi/ipmi-stub.c +++ b/hw/acpi/ipmi-stub.c @@ -10,6 +10,6 @@ #include "qemu/osdep.h" #include "hw/acpi/ipmi.h" -void build_acpi_ipmi_devices(Aml *table, BusState *bus) +void build_acpi_ipmi_devices(Aml *table, BusState *bus, const char *resource) { } diff --git a/hw/acpi/ipmi.c b/hw/acpi/ipmi.c index 651e2e94ea..96e48eba15 100644 --- a/hw/acpi/ipmi.c +++ b/hw/acpi/ipmi.c @@ -13,7 +13,7 @@ #include "hw/acpi/acpi.h" #include "hw/acpi/ipmi.h" -static Aml *aml_ipmi_crs(IPMIFwInfo *info) +static Aml *aml_ipmi_crs(IPMIFwInfo *info, const char *resource) { Aml *crs = aml_resource_template(); @@ -48,7 +48,8 @@ static Aml *aml_ipmi_crs(IPMIFwInfo *info) info->register_spacing, info->register_length)); break; case IPMI_MEMSPACE_SMBUS: - aml_append(crs, aml_return(aml_int(info->base_address))); + aml_append(crs, aml_i2c_serial_bus_device(info->base_address, + resource)); break; default: abort(); @@ -61,7 +62,7 @@ static Aml *aml_ipmi_crs(IPMIFwInfo *info) return crs; } -static Aml *aml_ipmi_device(IPMIFwInfo *info) +static Aml *aml_ipmi_device(IPMIFwInfo *info, const char *resource) { Aml *dev; uint16_t version = ((info->ipmi_spec_major_revision << 8) @@ -74,14 +75,14 @@ static Aml *aml_ipmi_device(IPMIFwInfo *info) aml_append(dev, aml_name_decl("_STR", aml_string("ipmi_%s", info->interface_name))); aml_append(dev, aml_name_decl("_UID", aml_int(info->uuid))); - aml_append(dev, aml_name_decl("_CRS", aml_ipmi_crs(info))); + aml_append(dev, aml_name_decl("_CRS", aml_ipmi_crs(info, resource))); aml_append(dev, aml_name_decl("_IFT", aml_int(info->interface_type))); aml_append(dev, aml_name_decl("_SRV", aml_int(version))); return dev; } -void build_acpi_ipmi_devices(Aml *scope, BusState *bus) +void build_acpi_ipmi_devices(Aml *scope, BusState *bus, const char *resource) { BusChild *kid; @@ -101,6 +102,6 @@ void build_acpi_ipmi_devices(Aml *scope, BusState *bus) iic = IPMI_INTERFACE_GET_CLASS(obj); memset(&info, 0, sizeof(info)); iic->get_fwinfo(ii, &info); - aml_append(scope, aml_ipmi_device(&info)); + aml_append(scope, aml_ipmi_device(&info, resource)); } } diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index e54e571a75..8acf12df9a 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -1290,7 +1290,7 @@ static void build_isa_devices_aml(Aml *table) } else if (!obj) { error_report("No ISA bus, unable to define IPMI ACPI data"); } else { - build_acpi_ipmi_devices(scope, BUS(obj)); + build_acpi_ipmi_devices(scope, BUS(obj), "\\_SB.PCI0.ISA"); } aml_append(table, scope); diff --git a/include/hw/acpi/ipmi.h b/include/hw/acpi/ipmi.h index c38483565c..c14ad682ac 100644 --- a/include/hw/acpi/ipmi.h +++ b/include/hw/acpi/ipmi.h @@ -16,6 +16,6 @@ * bus matches the given bus. The resource is the ACPI resource that * contains the IPMI device, this is required for the I2C CRS. */ -void build_acpi_ipmi_devices(Aml *table, BusState *bus); +void build_acpi_ipmi_devices(Aml *table, BusState *bus, const char *resource); #endif /* HW_ACPI_IPMI_H */ -- cgit v1.2.3-55-g7522 From ebe15582cafeb944a1c6e99aa526e81a1551c567 Mon Sep 17 00:00:00 2001 From: Corey Minyard Date: Thu, 12 May 2016 20:43:45 -0500 Subject: pc: Add an SMB0 ACPI device to q35 This is so I2C devices can be found in the ACPI namespace. Currently that's only IPMI, but devices can be easily added now. Adding the devices required some PCI information, and the bus itself to be added to the PCMachineState structure. Note that this only works on Q35, the ACPI for PIIX4 is not capable of handling an SMBus device. Cc: Michael S. Tsirkin Cc: Igor Mammedov Signed-off-by: Corey Minyard Reviewed-by: Paolo Bonzini --- hw/i386/acpi-build.c | 15 +++++++++++++++ hw/i386/pc_piix.c | 12 ++++++------ hw/i386/pc_q35.c | 9 +++++---- include/hw/i386/pc.h | 2 ++ tests/data/acpi/q35/DSDT | Bin 7841 -> 7879 bytes tests/data/acpi/q35/DSDT.bridge | Bin 7858 -> 7896 bytes tests/data/acpi/q35/DSDT.cphp | Bin 8304 -> 8342 bytes tests/data/acpi/q35/DSDT.dimmpxm | Bin 9494 -> 9532 bytes tests/data/acpi/q35/DSDT.ipmibt | Bin 7916 -> 7954 bytes tests/data/acpi/q35/DSDT.memhp | Bin 9200 -> 9238 bytes tests/data/acpi/q35/DSDT.mmio64 | Bin 8971 -> 9009 bytes tests/data/acpi/q35/DSDT.numamem | Bin 7847 -> 7885 bytes 12 files changed, 28 insertions(+), 10 deletions(-) (limited to 'include') diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 8acf12df9a..4e0f9f425a 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -1809,6 +1809,18 @@ static Aml *build_q35_osc_method(void) return method; } +static void build_smb0(Aml *table, I2CBus *smbus, int devnr, int func) +{ + Aml *scope = aml_scope("_SB.PCI0"); + Aml *dev = aml_device("SMB0"); + + aml_append(dev, aml_name_decl("_HID", aml_eisaid("APP0005"))); + aml_append(dev, aml_name_decl("_ADR", aml_int(devnr << 16 | func))); + build_acpi_ipmi_devices(dev, BUS(smbus), "\\_SB.PCI0.SMB0"); + aml_append(scope, dev); + aml_append(table, scope); +} + static void build_dsdt(GArray *table_data, BIOSLinker *linker, AcpiPmInfo *pm, AcpiMiscInfo *misc, @@ -1862,6 +1874,9 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, build_q35_isa_bridge(dsdt); build_isa_devices_aml(dsdt); build_q35_pci0_int(dsdt); + if (pcms->smbus && !pcmc->do_not_add_smb_acpi) { + build_smb0(dsdt, pcms->smbus, ICH9_SMB_DEV, ICH9_SMB_FUNC); + } } if (pcmc->legacy_cpu_hotplug) { diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 2362675149..6824b72124 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -283,15 +283,14 @@ else { if (pcmc->pci_enabled && acpi_enabled) { DeviceState *piix4_pm; - I2CBus *smbus; smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0); /* TODO: Populate SPD eeprom data. */ - smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, - pcms->gsi[9], smi_irq, - pc_machine_is_smm_enabled(pcms), - &piix4_pm); - smbus_eeprom_init(smbus, 8, NULL, 0); + pcms->smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, + pcms->gsi[9], smi_irq, + pc_machine_is_smm_enabled(pcms), + &piix4_pm); + smbus_eeprom_init(pcms->smbus, 8, NULL, 0); object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP, TYPE_HOTPLUG_HANDLER, @@ -476,6 +475,7 @@ static void pc_i440fx_3_1_machine_options(MachineClass *m) pc_i440fx_4_0_machine_options(m); m->is_default = 0; + pcmc->do_not_add_smb_acpi = true; m->smbus_no_migration_support = true; m->alias = NULL; pcmc->pvh_enabled = false; diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index d4e8a1cb9f..8fad20f314 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -316,10 +316,10 @@ static void pc_q35_init(MachineState *machine) if (pcms->smbus_enabled) { /* TODO: Populate SPD eeprom data. */ - smbus_eeprom_init(ich9_smb_init(host_bus, - PCI_DEVFN(ICH9_SMB_DEV, ICH9_SMB_FUNC), - 0xb100), - 8, NULL, 0); + pcms->smbus = ich9_smb_init(host_bus, + PCI_DEVFN(ICH9_SMB_DEV, ICH9_SMB_FUNC), + 0xb100); + smbus_eeprom_init(pcms->smbus, 8, NULL, 0); } pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state); @@ -421,6 +421,7 @@ static void pc_q35_3_1_machine_options(MachineClass *m) pc_q35_4_0_machine_options(m); m->default_kernel_irqchip_split = false; + pcmc->do_not_add_smb_acpi = true; m->smbus_no_migration_support = true; m->alias = NULL; pcmc->pvh_enabled = false; diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 062feeb69e..6df4f4b6fb 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -38,6 +38,7 @@ struct PCMachineState { HotplugHandler *acpi_dev; ISADevice *rtc; PCIBus *bus; + I2CBus *smbus; FWCfgState *fw_cfg; qemu_irq *gsi; PFlashCFI01 *flash[2]; @@ -117,6 +118,7 @@ typedef struct PCMachineClass { bool rsdp_in_ram; int legacy_acpi_table_size; unsigned acpi_data_size; + bool do_not_add_smb_acpi; /* SMBIOS compat: */ bool smbios_defaults; diff --git a/tests/data/acpi/q35/DSDT b/tests/data/acpi/q35/DSDT index f9f36d1645..77ea60ffed 100644 Binary files a/tests/data/acpi/q35/DSDT and b/tests/data/acpi/q35/DSDT differ diff --git a/tests/data/acpi/q35/DSDT.bridge b/tests/data/acpi/q35/DSDT.bridge index 29176832ca..fbc2d40000 100644 Binary files a/tests/data/acpi/q35/DSDT.bridge and b/tests/data/acpi/q35/DSDT.bridge differ diff --git a/tests/data/acpi/q35/DSDT.cphp b/tests/data/acpi/q35/DSDT.cphp index 19bdb5d210..6a896cb214 100644 Binary files a/tests/data/acpi/q35/DSDT.cphp and b/tests/data/acpi/q35/DSDT.cphp differ diff --git a/tests/data/acpi/q35/DSDT.dimmpxm b/tests/data/acpi/q35/DSDT.dimmpxm index 727fe489b4..23fdf5e60a 100644 Binary files a/tests/data/acpi/q35/DSDT.dimmpxm and b/tests/data/acpi/q35/DSDT.dimmpxm differ diff --git a/tests/data/acpi/q35/DSDT.ipmibt b/tests/data/acpi/q35/DSDT.ipmibt index 9634930e61..c3fca0a71e 100644 Binary files a/tests/data/acpi/q35/DSDT.ipmibt and b/tests/data/acpi/q35/DSDT.ipmibt differ diff --git a/tests/data/acpi/q35/DSDT.memhp b/tests/data/acpi/q35/DSDT.memhp index dad5dc8db2..2abd0e36cd 100644 Binary files a/tests/data/acpi/q35/DSDT.memhp and b/tests/data/acpi/q35/DSDT.memhp differ diff --git a/tests/data/acpi/q35/DSDT.mmio64 b/tests/data/acpi/q35/DSDT.mmio64 index 20f627ed08..b32034a11c 100644 Binary files a/tests/data/acpi/q35/DSDT.mmio64 and b/tests/data/acpi/q35/DSDT.mmio64 differ diff --git a/tests/data/acpi/q35/DSDT.numamem b/tests/data/acpi/q35/DSDT.numamem index 7b96a97280..d8b2b47f8b 100644 Binary files a/tests/data/acpi/q35/DSDT.numamem and b/tests/data/acpi/q35/DSDT.numamem differ -- cgit v1.2.3-55-g7522