From f7c9aecbf850fd819643ea884de338f810e285f1 Mon Sep 17 00:00:00 2001 From: Francisco Iglesias Date: Fri, 21 Jan 2022 16:11:34 +0000 Subject: hw/arm/xlnx-versal: Connect Versal's PMC SLCR Connect Versal's PMC SLCR (system-level control registers) model. Signed-off-by: Francisco Iglesias Reviewed-by: Luc Michel Message-id: 20220121161141.14389-4-francisco.iglesias@xilinx.com Signed-off-by: Peter Maydell --- include/hw/arm/xlnx-versal.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include') diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h index 62fb6f0a68..811df73350 100644 --- a/include/hw/arm/xlnx-versal.h +++ b/include/hw/arm/xlnx-versal.h @@ -26,6 +26,7 @@ #include "hw/misc/xlnx-versal-xramc.h" #include "hw/nvram/xlnx-bbram.h" #include "hw/nvram/xlnx-versal-efuse.h" +#include "hw/misc/xlnx-versal-pmc-iou-slcr.h" #define TYPE_XLNX_VERSAL "xlnx-versal" OBJECT_DECLARE_SIMPLE_TYPE(Versal, XLNX_VERSAL) @@ -78,6 +79,7 @@ struct Versal { struct { struct { SDHCIState sd[XLNX_VERSAL_NR_SDS]; + XlnxVersalPmcIouSlcr slcr; } iou; XlnxZynqMPRTC rtc; @@ -179,6 +181,9 @@ struct Versal { #define MM_FPD_FPD_APU 0xfd5c0000 #define MM_FPD_FPD_APU_SIZE 0x100 +#define MM_PMC_PMC_IOU_SLCR 0xf1060000 +#define MM_PMC_PMC_IOU_SLCR_SIZE 0x10000 + #define MM_PMC_SD0 0xf1040000U #define MM_PMC_SD0_SIZE 0x10000 #define MM_PMC_BBRAM_CTRL 0xf11f0000 -- cgit v1.2.3-55-g7522