From 6efd55995a224787baa712500b82ef21a148d38e Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Wed, 19 Aug 2020 22:37:40 -0700 Subject: target/microblaze: Fix width of ESR The exception status register is only 32-bits wide. Do not use a 64-bit type to represent it. Tested-by: Edgar E. Iglesias Reviewed-by: Edgar E. Iglesias Signed-off-by: Richard Henderson --- linux-user/microblaze/cpu_loop.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'linux-user/microblaze/cpu_loop.c') diff --git a/linux-user/microblaze/cpu_loop.c b/linux-user/microblaze/cpu_loop.c index da5e98b784..3de99ea311 100644 --- a/linux-user/microblaze/cpu_loop.c +++ b/linux-user/microblaze/cpu_loop.c @@ -106,7 +106,7 @@ void cpu_loop(CPUMBState *env) queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); break; default: - fprintf(stderr, "Unhandled hw-exception: 0x%" PRIx64 "\n", + fprintf(stderr, "Unhandled hw-exception: 0x%x\n", env->esr & ESR_EC_MASK); cpu_dump_state(cs, stderr, 0); exit(EXIT_FAILURE); -- cgit v1.2.3-55-g7522