From d0ff8d056d3aab93b4a7b7910f938652c2febc77 Mon Sep 17 00:00:00 2001 From: Andreas Färber Date: Sun, 7 Jul 2013 12:55:44 +0200 Subject: target-lm32: Move cpu_gdb_{read,write}_register() Acked-by: Michael Walle Signed-off-by: Andreas Färber --- target-lm32/gdbstub.c | 85 +++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 85 insertions(+) create mode 100644 target-lm32/gdbstub.c (limited to 'target-lm32/gdbstub.c') diff --git a/target-lm32/gdbstub.c b/target-lm32/gdbstub.c new file mode 100644 index 0000000000..732a633b7a --- /dev/null +++ b/target-lm32/gdbstub.c @@ -0,0 +1,85 @@ +/* + * LM32 gdb server stub + * + * Copyright (c) 2003-2005 Fabrice Bellard + * Copyright (c) 2013 SUSE LINUX Products GmbH + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ +#include "hw/lm32/lm32_pic.h" + +static int cpu_gdb_read_register(CPULM32State *env, uint8_t *mem_buf, int n) +{ + if (n < 32) { + GET_REG32(env->regs[n]); + } else { + switch (n) { + case 32: + GET_REG32(env->pc); + /* FIXME: put in right exception ID */ + case 33: + GET_REG32(0); + case 34: + GET_REG32(env->eba); + case 35: + GET_REG32(env->deba); + case 36: + GET_REG32(env->ie); + case 37: + GET_REG32(lm32_pic_get_im(env->pic_state)); + case 38: + GET_REG32(lm32_pic_get_ip(env->pic_state)); + } + } + return 0; +} + +static int cpu_gdb_write_register(CPULM32State *env, uint8_t *mem_buf, int n) +{ + LM32CPU *cpu = lm32_env_get_cpu(env); + CPUClass *cc = CPU_GET_CLASS(cpu); + uint32_t tmp; + + if (n > cc->gdb_num_core_regs) { + return 0; + } + + tmp = ldl_p(mem_buf); + + if (n < 32) { + env->regs[n] = tmp; + } else { + switch (n) { + case 32: + env->pc = tmp; + break; + case 34: + env->eba = tmp; + break; + case 35: + env->deba = tmp; + break; + case 36: + env->ie = tmp; + break; + case 37: + lm32_pic_set_im(env->pic_state, tmp); + break; + case 38: + lm32_pic_set_ip(env->pic_state, tmp); + break; + } + } + return 4; +} -- cgit v1.2.3-55-g7522 From 986a2998932e978e63fc3b7ead1fef81f7aad52e Mon Sep 17 00:00:00 2001 From: Andreas Färber Date: Sun, 7 Jul 2013 13:05:05 +0200 Subject: gdbstub: Replace GET_REG*() macros with gdb_get_reg*() functions This avoids polluting the global namespace with a non-prefixed macro and makes it obvious in the call sites that we return. Semi-automatic conversion using, e.g., sed -i 's/GET_REGL(/return gdb_get_regl(mem_buf, /g' target-*/gdbstub.c followed by manual tweaking for sparc's GET_REGA() and Coding Style. Acked-by: Michael Walle (for lm32) Acked-by: Max Filippov (for xtensa) Signed-off-by: Andreas Färber --- gdbstub.c | 29 ------------------------ include/exec/gdbstub.h | 37 +++++++++++++++++++++++++++++++ target-alpha/gdbstub.c | 2 +- target-arm/gdbstub.c | 6 ++--- target-cris/gdbstub.c | 30 ++++++++++++------------- target-i386/gdbstub.c | 42 +++++++++++++++++------------------ target-lm32/gdbstub.c | 16 +++++++------- target-m68k/gdbstub.c | 8 +++---- target-microblaze/gdbstub.c | 4 ++-- target-mips/gdbstub.c | 31 ++++++++++++++------------ target-openrisc/gdbstub.c | 8 +++---- target-ppc/gdbstub.c | 16 +++++++------- target-s390x/gdbstub.c | 12 +++++----- target-sh4/gdbstub.c | 32 +++++++++++++-------------- target-sparc/gdbstub.c | 54 ++++++++++++++++++++++----------------------- target-xtensa/gdbstub.c | 14 +++++++----- 16 files changed, 177 insertions(+), 164 deletions(-) (limited to 'target-lm32/gdbstub.c') diff --git a/gdbstub.c b/gdbstub.c index 75271954d5..eb506309d4 100644 --- a/gdbstub.c +++ b/gdbstub.c @@ -489,35 +489,6 @@ static int put_packet(GDBState *s, const char *buf) return put_packet_binary(s, buf, strlen(buf)); } -/* The GDB remote protocol transfers values in target byte order. This means - we can use the raw memory access routines to access the value buffer. - Conveniently, these also handle the case where the buffer is mis-aligned. - */ -#define GET_REG8(val) do { \ - stb_p(mem_buf, val); \ - return 1; \ - } while(0) -#define GET_REG16(val) do { \ - stw_p(mem_buf, val); \ - return 2; \ - } while(0) -#define GET_REG32(val) do { \ - stl_p(mem_buf, val); \ - return 4; \ - } while(0) -#define GET_REG64(val) do { \ - stq_p(mem_buf, val); \ - return 8; \ - } while(0) - -#if TARGET_LONG_BITS == 64 -#define GET_REGL(val) GET_REG64(val) -#define ldtul_p(addr) ldq_p(addr) -#else -#define GET_REGL(val) GET_REG32(val) -#define ldtul_p(addr) ldl_p(addr) -#endif - #if defined(TARGET_I386) #include "target-i386/gdbstub.c" diff --git a/include/exec/gdbstub.h b/include/exec/gdbstub.h index 7ea1ad7f9c..a5bd341d55 100644 --- a/include/exec/gdbstub.h +++ b/include/exec/gdbstub.h @@ -39,6 +39,43 @@ static inline int cpu_index(CPUState *cpu) #endif } +/* The GDB remote protocol transfers values in target byte order. This means + * we can use the raw memory access routines to access the value buffer. + * Conveniently, these also handle the case where the buffer is mis-aligned. + */ + +static inline int gdb_get_reg8(uint8_t *mem_buf, uint8_t val) +{ + stb_p(mem_buf, val); + return 1; +} + +static inline int gdb_get_reg16(uint8_t *mem_buf, uint16_t val) +{ + stw_p(mem_buf, val); + return 2; +} + +static inline int gdb_get_reg32(uint8_t *mem_buf, uint32_t val) +{ + stl_p(mem_buf, val); + return 4; +} + +static inline int gdb_get_reg64(uint8_t *mem_buf, uint64_t val) +{ + stq_p(mem_buf, val); + return 8; +} + +#if TARGET_LONG_BITS == 64 +#define gdb_get_regl(buf, val) gdb_get_reg64(buf, val) +#define ldtul_p(addr) ldq_p(addr) +#else +#define gdb_get_regl(buf, val) gdb_get_reg32(buf, val) +#define ldtul_p(addr) ldl_p(addr) +#endif + #endif #ifdef CONFIG_USER_ONLY diff --git a/target-alpha/gdbstub.c b/target-alpha/gdbstub.c index b23afe4587..1c18698aa6 100644 --- a/target-alpha/gdbstub.c +++ b/target-alpha/gdbstub.c @@ -49,7 +49,7 @@ static int cpu_gdb_read_register(CPUAlphaState *env, uint8_t *mem_buf, int n) default: return 0; } - GET_REGL(val); + return gdb_get_regl(mem_buf, val); } static int cpu_gdb_write_register(CPUAlphaState *env, uint8_t *mem_buf, int n) diff --git a/target-arm/gdbstub.c b/target-arm/gdbstub.c index 74903a372e..e1c7df4149 100644 --- a/target-arm/gdbstub.c +++ b/target-arm/gdbstub.c @@ -28,7 +28,7 @@ static int cpu_gdb_read_register(CPUARMState *env, uint8_t *mem_buf, int n) { if (n < 16) { /* Core integer register. */ - GET_REG32(env->regs[n]); + return gdb_get_reg32(mem_buf, env->regs[n]); } if (n < 24) { /* FPA registers. */ @@ -44,10 +44,10 @@ static int cpu_gdb_read_register(CPUARMState *env, uint8_t *mem_buf, int n) if (gdb_has_xml) { return 0; } - GET_REG32(0); + return gdb_get_reg32(mem_buf, 0); case 25: /* CPSR */ - GET_REG32(cpsr_read(env)); + return gdb_get_reg32(mem_buf, cpsr_read(env)); } /* Unknown register. */ return 0; diff --git a/target-cris/gdbstub.c b/target-cris/gdbstub.c index b48224a14f..ed23966c91 100644 --- a/target-cris/gdbstub.c +++ b/target-cris/gdbstub.c @@ -22,25 +22,25 @@ static int read_register_crisv10(CPUCRISState *env, uint8_t *mem_buf, int n) { if (n < 15) { - GET_REG32(env->regs[n]); + return gdb_get_reg32(mem_buf, env->regs[n]); } if (n == 15) { - GET_REG32(env->pc); + return gdb_get_reg32(mem_buf, env->pc); } if (n < 32) { switch (n) { case 16: - GET_REG8(env->pregs[n - 16]); + return gdb_get_reg8(mem_buf, env->pregs[n - 16]); case 17: - GET_REG8(env->pregs[n - 16]); + return gdb_get_reg8(mem_buf, env->pregs[n - 16]); case 20: case 21: - GET_REG16(env->pregs[n - 16]); + return gdb_get_reg16(mem_buf, env->pregs[n - 16]); default: if (n >= 23) { - GET_REG32(env->pregs[n - 16]); + return gdb_get_reg32(mem_buf, env->pregs[n - 16]); } break; } @@ -58,28 +58,28 @@ static int cpu_gdb_read_register(CPUCRISState *env, uint8_t *mem_buf, int n) srs = env->pregs[PR_SRS]; if (n < 16) { - GET_REG32(env->regs[n]); + return gdb_get_reg32(mem_buf, env->regs[n]); } if (n >= 21 && n < 32) { - GET_REG32(env->pregs[n - 16]); + return gdb_get_reg32(mem_buf, env->pregs[n - 16]); } if (n >= 33 && n < 49) { - GET_REG32(env->sregs[srs][n - 33]); + return gdb_get_reg32(mem_buf, env->sregs[srs][n - 33]); } switch (n) { case 16: - GET_REG8(env->pregs[0]); + return gdb_get_reg8(mem_buf, env->pregs[0]); case 17: - GET_REG8(env->pregs[1]); + return gdb_get_reg8(mem_buf, env->pregs[1]); case 18: - GET_REG32(env->pregs[2]); + return gdb_get_reg32(mem_buf, env->pregs[2]); case 19: - GET_REG8(srs); + return gdb_get_reg8(mem_buf, srs); case 20: - GET_REG16(env->pregs[4]); + return gdb_get_reg16(mem_buf, env->pregs[4]); case 32: - GET_REG32(env->pc); + return gdb_get_reg32(mem_buf, env->pc); } return 0; diff --git a/target-i386/gdbstub.c b/target-i386/gdbstub.c index 974d8ad9a3..0a4d97d24c 100644 --- a/target-i386/gdbstub.c +++ b/target-i386/gdbstub.c @@ -39,9 +39,9 @@ static int cpu_gdb_read_register(CPUX86State *env, uint8_t *mem_buf, int n) { if (n < CPU_NB_REGS) { if (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK) { - GET_REG64(env->regs[gpr_map[n]]); + return gdb_get_reg64(mem_buf, env->regs[gpr_map[n]]); } else if (n < CPU_NB_REGS32) { - GET_REG32(env->regs[gpr_map32[n]]); + return gdb_get_reg32(mem_buf, env->regs[gpr_map32[n]]); } } else if (n >= IDX_FP_REGS && n < IDX_FP_REGS + 8) { #ifdef USE_X86LDOUBLE @@ -63,46 +63,46 @@ static int cpu_gdb_read_register(CPUX86State *env, uint8_t *mem_buf, int n) switch (n) { case IDX_IP_REG: if (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK) { - GET_REG64(env->eip); + return gdb_get_reg64(mem_buf, env->eip); } else { - GET_REG32(env->eip); + return gdb_get_reg32(mem_buf, env->eip); } case IDX_FLAGS_REG: - GET_REG32(env->eflags); + return gdb_get_reg32(mem_buf, env->eflags); case IDX_SEG_REGS: - GET_REG32(env->segs[R_CS].selector); + return gdb_get_reg32(mem_buf, env->segs[R_CS].selector); case IDX_SEG_REGS + 1: - GET_REG32(env->segs[R_SS].selector); + return gdb_get_reg32(mem_buf, env->segs[R_SS].selector); case IDX_SEG_REGS + 2: - GET_REG32(env->segs[R_DS].selector); + return gdb_get_reg32(mem_buf, env->segs[R_DS].selector); case IDX_SEG_REGS + 3: - GET_REG32(env->segs[R_ES].selector); + return gdb_get_reg32(mem_buf, env->segs[R_ES].selector); case IDX_SEG_REGS + 4: - GET_REG32(env->segs[R_FS].selector); + return gdb_get_reg32(mem_buf, env->segs[R_FS].selector); case IDX_SEG_REGS + 5: - GET_REG32(env->segs[R_GS].selector); + return gdb_get_reg32(mem_buf, env->segs[R_GS].selector); case IDX_FP_REGS + 8: - GET_REG32(env->fpuc); + return gdb_get_reg32(mem_buf, env->fpuc); case IDX_FP_REGS + 9: - GET_REG32((env->fpus & ~0x3800) | - (env->fpstt & 0x7) << 11); + return gdb_get_reg32(mem_buf, (env->fpus & ~0x3800) | + (env->fpstt & 0x7) << 11); case IDX_FP_REGS + 10: - GET_REG32(0); /* ftag */ + return gdb_get_reg32(mem_buf, 0); /* ftag */ case IDX_FP_REGS + 11: - GET_REG32(0); /* fiseg */ + return gdb_get_reg32(mem_buf, 0); /* fiseg */ case IDX_FP_REGS + 12: - GET_REG32(0); /* fioff */ + return gdb_get_reg32(mem_buf, 0); /* fioff */ case IDX_FP_REGS + 13: - GET_REG32(0); /* foseg */ + return gdb_get_reg32(mem_buf, 0); /* foseg */ case IDX_FP_REGS + 14: - GET_REG32(0); /* fooff */ + return gdb_get_reg32(mem_buf, 0); /* fooff */ case IDX_FP_REGS + 15: - GET_REG32(0); /* fop */ + return gdb_get_reg32(mem_buf, 0); /* fop */ case IDX_MXCSR_REG: - GET_REG32(env->mxcsr); + return gdb_get_reg32(mem_buf, env->mxcsr); } } return 0; diff --git a/target-lm32/gdbstub.c b/target-lm32/gdbstub.c index 732a633b7a..17f08f5d94 100644 --- a/target-lm32/gdbstub.c +++ b/target-lm32/gdbstub.c @@ -22,24 +22,24 @@ static int cpu_gdb_read_register(CPULM32State *env, uint8_t *mem_buf, int n) { if (n < 32) { - GET_REG32(env->regs[n]); + return gdb_get_reg32(mem_buf, env->regs[n]); } else { switch (n) { case 32: - GET_REG32(env->pc); + return gdb_get_reg32(mem_buf, env->pc); /* FIXME: put in right exception ID */ case 33: - GET_REG32(0); + return gdb_get_reg32(mem_buf, 0); case 34: - GET_REG32(env->eba); + return gdb_get_reg32(mem_buf, env->eba); case 35: - GET_REG32(env->deba); + return gdb_get_reg32(mem_buf, env->deba); case 36: - GET_REG32(env->ie); + return gdb_get_reg32(mem_buf, env->ie); case 37: - GET_REG32(lm32_pic_get_im(env->pic_state)); + return gdb_get_reg32(mem_buf, lm32_pic_get_im(env->pic_state)); case 38: - GET_REG32(lm32_pic_get_ip(env->pic_state)); + return gdb_get_reg32(mem_buf, lm32_pic_get_ip(env->pic_state)); } } return 0; diff --git a/target-m68k/gdbstub.c b/target-m68k/gdbstub.c index 2eb4b980c4..9fa9fa6a1f 100644 --- a/target-m68k/gdbstub.c +++ b/target-m68k/gdbstub.c @@ -22,16 +22,16 @@ static int cpu_gdb_read_register(CPUM68KState *env, uint8_t *mem_buf, int n) { if (n < 8) { /* D0-D7 */ - GET_REG32(env->dregs[n]); + return gdb_get_reg32(mem_buf, env->dregs[n]); } else if (n < 16) { /* A0-A7 */ - GET_REG32(env->aregs[n - 8]); + return gdb_get_reg32(mem_buf, env->aregs[n - 8]); } else { switch (n) { case 16: - GET_REG32(env->sr); + return gdb_get_reg32(mem_buf, env->sr); case 17: - GET_REG32(env->pc); + return gdb_get_reg32(mem_buf, env->pc); } } /* FP registers not included here because they vary between diff --git a/target-microblaze/gdbstub.c b/target-microblaze/gdbstub.c index 96c4bc085a..678de21b5f 100644 --- a/target-microblaze/gdbstub.c +++ b/target-microblaze/gdbstub.c @@ -21,9 +21,9 @@ static int cpu_gdb_read_register(CPUMBState *env, uint8_t *mem_buf, int n) { if (n < 32) { - GET_REG32(env->regs[n]); + return gdb_get_reg32(mem_buf, env->regs[n]); } else { - GET_REG32(env->sregs[n - 32]); + return gdb_get_reg32(mem_buf, env->sregs[n - 32]); } return 0; } diff --git a/target-mips/gdbstub.c b/target-mips/gdbstub.c index 15dc281ea5..db826d8516 100644 --- a/target-mips/gdbstub.c +++ b/target-mips/gdbstub.c @@ -21,44 +21,47 @@ static int cpu_gdb_read_register(CPUMIPSState *env, uint8_t *mem_buf, int n) { if (n < 32) { - GET_REGL(env->active_tc.gpr[n]); + return gdb_get_regl(mem_buf, env->active_tc.gpr[n]); } if (env->CP0_Config1 & (1 << CP0C1_FP)) { if (n >= 38 && n < 70) { if (env->CP0_Status & (1 << CP0St_FR)) { - GET_REGL(env->active_fpu.fpr[n - 38].d); + return gdb_get_regl(mem_buf, + env->active_fpu.fpr[n - 38].d); } else { - GET_REGL(env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX]); + return gdb_get_regl(mem_buf, + env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX]); } } switch (n) { case 70: - GET_REGL((int32_t)env->active_fpu.fcr31); + return gdb_get_regl(mem_buf, (int32_t)env->active_fpu.fcr31); case 71: - GET_REGL((int32_t)env->active_fpu.fcr0); + return gdb_get_regl(mem_buf, (int32_t)env->active_fpu.fcr0); } } switch (n) { case 32: - GET_REGL((int32_t)env->CP0_Status); + return gdb_get_regl(mem_buf, (int32_t)env->CP0_Status); case 33: - GET_REGL(env->active_tc.LO[0]); + return gdb_get_regl(mem_buf, env->active_tc.LO[0]); case 34: - GET_REGL(env->active_tc.HI[0]); + return gdb_get_regl(mem_buf, env->active_tc.HI[0]); case 35: - GET_REGL(env->CP0_BadVAddr); + return gdb_get_regl(mem_buf, env->CP0_BadVAddr); case 36: - GET_REGL((int32_t)env->CP0_Cause); + return gdb_get_regl(mem_buf, (int32_t)env->CP0_Cause); case 37: - GET_REGL(env->active_tc.PC | !!(env->hflags & MIPS_HFLAG_M16)); + return gdb_get_regl(mem_buf, env->active_tc.PC | + !!(env->hflags & MIPS_HFLAG_M16)); case 72: - GET_REGL(0); /* fp */ + return gdb_get_regl(mem_buf, 0); /* fp */ case 89: - GET_REGL((int32_t)env->CP0_PRid); + return gdb_get_regl(mem_buf, (int32_t)env->CP0_PRid); } if (n >= 73 && n <= 88) { /* 16 embedded regs. */ - GET_REGL(0); + return gdb_get_regl(mem_buf, 0); } return 0; diff --git a/target-openrisc/gdbstub.c b/target-openrisc/gdbstub.c index fba096aa1c..bdb8d2c73f 100644 --- a/target-openrisc/gdbstub.c +++ b/target-openrisc/gdbstub.c @@ -21,17 +21,17 @@ static int cpu_gdb_read_register(CPUOpenRISCState *env, uint8_t *mem_buf, int n) { if (n < 32) { - GET_REG32(env->gpr[n]); + return gdb_get_reg32(mem_buf, env->gpr[n]); } else { switch (n) { case 32: /* PPC */ - GET_REG32(env->ppc); + return gdb_get_reg32(mem_buf, env->ppc); case 33: /* NPC */ - GET_REG32(env->npc); + return gdb_get_reg32(mem_buf, env->npc); case 34: /* SR */ - GET_REG32(env->sr); + return gdb_get_reg32(mem_buf, env->sr); default: break; diff --git a/target-ppc/gdbstub.c b/target-ppc/gdbstub.c index b834e60f54..40a9d7b6d4 100644 --- a/target-ppc/gdbstub.c +++ b/target-ppc/gdbstub.c @@ -29,7 +29,7 @@ static int cpu_gdb_read_register(CPUPPCState *env, uint8_t *mem_buf, int n) { if (n < 32) { /* gprs */ - GET_REGL(env->gpr[n]); + return gdb_get_regl(mem_buf, env->gpr[n]); } else if (n < 64) { /* fprs */ if (gdb_has_xml) { @@ -40,9 +40,9 @@ static int cpu_gdb_read_register(CPUPPCState *env, uint8_t *mem_buf, int n) } else { switch (n) { case 64: - GET_REGL(env->nip); + return gdb_get_regl(mem_buf, env->nip); case 65: - GET_REGL(env->msr); + return gdb_get_regl(mem_buf, env->msr); case 66: { uint32_t cr = 0; @@ -50,20 +50,20 @@ static int cpu_gdb_read_register(CPUPPCState *env, uint8_t *mem_buf, int n) for (i = 0; i < 8; i++) { cr |= env->crf[i] << (32 - ((i + 1) * 4)); } - GET_REG32(cr); + return gdb_get_reg32(mem_buf, cr); } case 67: - GET_REGL(env->lr); + return gdb_get_regl(mem_buf, env->lr); case 68: - GET_REGL(env->ctr); + return gdb_get_regl(mem_buf, env->ctr); case 69: - GET_REGL(env->xer); + return gdb_get_regl(mem_buf, env->xer); case 70: { if (gdb_has_xml) { return 0; } - GET_REG32(env->fpscr); + return gdb_get_reg32(mem_buf, env->fpscr); } } } diff --git a/target-s390x/gdbstub.c b/target-s390x/gdbstub.c index c966143a9d..ee3e984a32 100644 --- a/target-s390x/gdbstub.c +++ b/target-s390x/gdbstub.c @@ -27,17 +27,17 @@ static int cpu_gdb_read_register(CPUS390XState *env, uint8_t *mem_buf, int n) case S390_PSWM_REGNUM: cc_op = calc_cc(env, env->cc_op, env->cc_src, env->cc_dst, env->cc_vr); val = deposit64(env->psw.mask, 44, 2, cc_op); - GET_REGL(val); + return gdb_get_regl(mem_buf, val); case S390_PSWA_REGNUM: - GET_REGL(env->psw.addr); + return gdb_get_regl(mem_buf, env->psw.addr); case S390_R0_REGNUM ... S390_R15_REGNUM: - GET_REGL(env->regs[n-S390_R0_REGNUM]); + return gdb_get_regl(mem_buf, env->regs[n-S390_R0_REGNUM]); case S390_A0_REGNUM ... S390_A15_REGNUM: - GET_REG32(env->aregs[n-S390_A0_REGNUM]); + return gdb_get_reg32(mem_buf, env->aregs[n-S390_A0_REGNUM]); case S390_FPC_REGNUM: - GET_REG32(env->fpc); + return gdb_get_reg32(mem_buf, env->fpc); case S390_F0_REGNUM ... S390_F15_REGNUM: - GET_REG64(env->fregs[n-S390_F0_REGNUM].ll); + return gdb_get_reg64(mem_buf, env->fregs[n-S390_F0_REGNUM].ll); } return 0; diff --git a/target-sh4/gdbstub.c b/target-sh4/gdbstub.c index 38bc630f3a..fb85718fc0 100644 --- a/target-sh4/gdbstub.c +++ b/target-sh4/gdbstub.c @@ -26,30 +26,30 @@ static int cpu_gdb_read_register(CPUSH4State *env, uint8_t *mem_buf, int n) switch (n) { case 0 ... 7: if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) { - GET_REGL(env->gregs[n + 16]); + return gdb_get_regl(mem_buf, env->gregs[n + 16]); } else { - GET_REGL(env->gregs[n]); + return gdb_get_regl(mem_buf, env->gregs[n]); } case 8 ... 15: - GET_REGL(env->gregs[n]); + return gdb_get_regl(mem_buf, env->gregs[n]); case 16: - GET_REGL(env->pc); + return gdb_get_regl(mem_buf, env->pc); case 17: - GET_REGL(env->pr); + return gdb_get_regl(mem_buf, env->pr); case 18: - GET_REGL(env->gbr); + return gdb_get_regl(mem_buf, env->gbr); case 19: - GET_REGL(env->vbr); + return gdb_get_regl(mem_buf, env->vbr); case 20: - GET_REGL(env->mach); + return gdb_get_regl(mem_buf, env->mach); case 21: - GET_REGL(env->macl); + return gdb_get_regl(mem_buf, env->macl); case 22: - GET_REGL(env->sr); + return gdb_get_regl(mem_buf, env->sr); case 23: - GET_REGL(env->fpul); + return gdb_get_regl(mem_buf, env->fpul); case 24: - GET_REGL(env->fpscr); + return gdb_get_regl(mem_buf, env->fpscr); case 25 ... 40: if (env->fpscr & FPSCR_FR) { stfl_p(mem_buf, env->fregs[n - 9]); @@ -58,13 +58,13 @@ static int cpu_gdb_read_register(CPUSH4State *env, uint8_t *mem_buf, int n) } return 4; case 41: - GET_REGL(env->ssr); + return gdb_get_regl(mem_buf, env->ssr); case 42: - GET_REGL(env->spc); + return gdb_get_regl(mem_buf, env->spc); case 43 ... 50: - GET_REGL(env->gregs[n - 43]); + return gdb_get_regl(mem_buf, env->gregs[n - 43]); case 51 ... 58: - GET_REGL(env->gregs[n - (51 - 16)]); + return gdb_get_regl(mem_buf, env->gregs[n - (51 - 16)]); } return 0; diff --git a/target-sparc/gdbstub.c b/target-sparc/gdbstub.c index 914f586ab3..460c0b7197 100644 --- a/target-sparc/gdbstub.c +++ b/target-sparc/gdbstub.c @@ -19,80 +19,80 @@ */ #ifdef TARGET_ABI32 -#define GET_REGA(val) GET_REG32(val) +#define gdb_get_rega(buf, val) gdb_get_reg32(buf, val) #else -#define GET_REGA(val) GET_REGL(val) +#define gdb_get_rega(buf, val) gdb_get_regl(buf, val) #endif static int cpu_gdb_read_register(CPUSPARCState *env, uint8_t *mem_buf, int n) { if (n < 8) { /* g0..g7 */ - GET_REGA(env->gregs[n]); + return gdb_get_rega(mem_buf, env->gregs[n]); } if (n < 32) { /* register window */ - GET_REGA(env->regwptr[n - 8]); + return gdb_get_rega(mem_buf, env->regwptr[n - 8]); } #if defined(TARGET_ABI32) || !defined(TARGET_SPARC64) if (n < 64) { /* fprs */ if (n & 1) { - GET_REG32(env->fpr[(n - 32) / 2].l.lower); + return gdb_get_reg32(mem_buf, env->fpr[(n - 32) / 2].l.lower); } else { - GET_REG32(env->fpr[(n - 32) / 2].l.upper); + return gdb_get_reg32(mem_buf, env->fpr[(n - 32) / 2].l.upper); } } /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */ switch (n) { case 64: - GET_REGA(env->y); + return gdb_get_rega(mem_buf, env->y); case 65: - GET_REGA(cpu_get_psr(env)); + return gdb_get_rega(mem_buf, cpu_get_psr(env)); case 66: - GET_REGA(env->wim); + return gdb_get_rega(mem_buf, env->wim); case 67: - GET_REGA(env->tbr); + return gdb_get_rega(mem_buf, env->tbr); case 68: - GET_REGA(env->pc); + return gdb_get_rega(mem_buf, env->pc); case 69: - GET_REGA(env->npc); + return gdb_get_rega(mem_buf, env->npc); case 70: - GET_REGA(env->fsr); + return gdb_get_rega(mem_buf, env->fsr); case 71: - GET_REGA(0); /* csr */ + return gdb_get_rega(mem_buf, 0); /* csr */ default: - GET_REGA(0); + return gdb_get_rega(mem_buf, 0); } #else if (n < 64) { /* f0-f31 */ if (n & 1) { - GET_REG32(env->fpr[(n - 32) / 2].l.lower); + return gdb_get_reg32(mem_buf, env->fpr[(n - 32) / 2].l.lower); } else { - GET_REG32(env->fpr[(n - 32) / 2].l.upper); + return gdb_get_reg32(mem_buf, env->fpr[(n - 32) / 2].l.upper); } } if (n < 80) { /* f32-f62 (double width, even numbers only) */ - GET_REG64(env->fpr[(n - 32) / 2].ll); + return gdb_get_reg64(mem_buf, env->fpr[(n - 32) / 2].ll); } switch (n) { case 80: - GET_REGL(env->pc); + return gdb_get_regl(mem_buf, env->pc); case 81: - GET_REGL(env->npc); + return gdb_get_regl(mem_buf, env->npc); case 82: - GET_REGL((cpu_get_ccr(env) << 32) | - ((env->asi & 0xff) << 24) | - ((env->pstate & 0xfff) << 8) | - cpu_get_cwp64(env)); + return gdb_get_regl(mem_buf, (cpu_get_ccr(env) << 32) | + ((env->asi & 0xff) << 24) | + ((env->pstate & 0xfff) << 8) | + cpu_get_cwp64(env)); case 83: - GET_REGL(env->fsr); + return gdb_get_regl(mem_buf, env->fsr); case 84: - GET_REGL(env->fprs); + return gdb_get_regl(mem_buf, env->fprs); case 85: - GET_REGL(env->y); + return gdb_get_regl(mem_buf, env->y); } #endif return 0; diff --git a/target-xtensa/gdbstub.c b/target-xtensa/gdbstub.c index 0880b7cd87..c963563f1f 100644 --- a/target-xtensa/gdbstub.c +++ b/target-xtensa/gdbstub.c @@ -28,23 +28,25 @@ static int cpu_gdb_read_register(CPUXtensaState *env, uint8_t *mem_buf, int n) switch (reg->type) { case 9: /*pc*/ - GET_REG32(env->pc); + return gdb_get_reg32(mem_buf, env->pc); case 1: /*ar*/ xtensa_sync_phys_from_window(env); - GET_REG32(env->phys_regs[(reg->targno & 0xff) % env->config->nareg]); + return gdb_get_reg32(mem_buf, env->phys_regs[(reg->targno & 0xff) + % env->config->nareg]); case 2: /*SR*/ - GET_REG32(env->sregs[reg->targno & 0xff]); + return gdb_get_reg32(mem_buf, env->sregs[reg->targno & 0xff]); case 3: /*UR*/ - GET_REG32(env->uregs[reg->targno & 0xff]); + return gdb_get_reg32(mem_buf, env->uregs[reg->targno & 0xff]); case 4: /*f*/ - GET_REG32(float32_val(env->fregs[reg->targno & 0x0f])); + return gdb_get_reg32(mem_buf, float32_val(env->fregs[reg->targno + & 0x0f])); case 8: /*a*/ - GET_REG32(env->regs[reg->targno & 0x0f]); + return gdb_get_reg32(mem_buf, env->regs[reg->targno & 0x0f]); default: qemu_log("%s from reg %d of unsupported type %d\n", -- cgit v1.2.3-55-g7522 From 5b50e790f9e9403d11b4164193b76530ee85a2a1 Mon Sep 17 00:00:00 2001 From: Andreas Färber Date: Sat, 29 Jun 2013 04:18:45 +0200 Subject: cpu: Introduce CPUClass::gdb_{read,write}_register() Completes migration of target-specific code to new target-*/gdbstub.c. Acked-by: Michael Walle (for lm32) Acked-by: Max Filippov (for xtensa) Signed-off-by: Andreas Färber --- gdbstub.c | 80 ++++------------------------------------- include/exec/gdbstub.h | 8 +++++ include/qom/cpu.h | 4 +++ qom/cpu.c | 13 +++++++ target-alpha/Makefile.objs | 1 + target-alpha/cpu-qom.h | 2 ++ target-alpha/cpu.c | 2 ++ target-alpha/gdbstub.c | 11 ++++-- target-arm/Makefile.objs | 1 + target-arm/cpu-qom.h | 3 ++ target-arm/cpu.c | 2 ++ target-arm/gdbstub.c | 12 +++++-- target-cris/Makefile.objs | 1 + target-cris/cpu-qom.h | 3 ++ target-cris/cpu.c | 2 ++ target-cris/gdbstub.c | 11 ++++-- target-i386/Makefile.objs | 1 + target-i386/cpu-qom.h | 3 ++ target-i386/cpu.c | 2 ++ target-i386/gdbstub.c | 27 +++++++++----- target-lm32/Makefile.objs | 1 + target-lm32/cpu-qom.h | 2 ++ target-lm32/cpu.c | 2 ++ target-lm32/gdbstub.c | 15 +++++--- target-m68k/Makefile.objs | 1 + target-m68k/cpu-qom.h | 2 ++ target-m68k/cpu.c | 2 ++ target-m68k/gdbstub.c | 12 +++++-- target-microblaze/Makefile.objs | 1 + target-microblaze/cpu-qom.h | 2 ++ target-microblaze/cpu.c | 2 ++ target-microblaze/gdbstub.c | 15 +++++--- target-mips/Makefile.objs | 1 + target-mips/cpu-qom.h | 2 ++ target-mips/cpu.c | 2 ++ target-mips/gdbstub.c | 12 +++++-- target-openrisc/Makefile.objs | 1 + target-openrisc/cpu.c | 2 ++ target-openrisc/cpu.h | 2 ++ target-openrisc/gdbstub.c | 16 ++++++--- target-ppc/Makefile.objs | 1 + target-ppc/cpu-qom.h | 2 ++ target-ppc/gdbstub.c | 13 +++++-- target-ppc/translate_init.c | 2 ++ target-s390x/Makefile.objs | 1 + target-s390x/cpu-qom.h | 2 ++ target-s390x/cpu.c | 2 ++ target-s390x/gdbstub.c | 12 +++++-- target-sh4/Makefile.objs | 1 + target-sh4/cpu-qom.h | 2 ++ target-sh4/cpu.c | 2 ++ target-sh4/gdbstub.c | 13 +++++-- target-sparc/Makefile.objs | 1 + target-sparc/cpu-qom.h | 2 ++ target-sparc/cpu.c | 2 ++ target-sparc/gdbstub.c | 12 +++++-- target-xtensa/Makefile.objs | 1 + target-xtensa/cpu-qom.h | 2 ++ target-xtensa/cpu.c | 2 ++ target-xtensa/gdbstub.c | 11 ++++-- 60 files changed, 255 insertions(+), 115 deletions(-) (limited to 'target-lm32/gdbstub.c') diff --git a/gdbstub.c b/gdbstub.c index eb506309d4..d8a5a0e698 100644 --- a/gdbstub.c +++ b/gdbstub.c @@ -40,7 +40,6 @@ #include "cpu.h" #include "qemu/sockets.h" #include "sysemu/kvm.h" -#include "qemu/bitops.h" static inline int target_memory_rw_debug(CPUState *cpu, target_ulong addr, uint8_t *buf, int len, bool is_write) @@ -316,10 +315,7 @@ static int sstep_flags = SSTEP_ENABLE|SSTEP_NOIRQ|SSTEP_NOTIMER; static GDBState *gdbserver_state; -/* This is an ugly hack to cope with both new and old gdb. - If gdb sends qXfer:features:read then assume we're talking to a newish - gdb that understands target descriptions. */ -static int gdb_has_xml; +bool gdb_has_xml; #ifdef CONFIG_USER_ONLY /* XXX: This is not thread safe. Do we care? */ @@ -489,11 +485,7 @@ static int put_packet(GDBState *s, const char *buf) return put_packet_binary(s, buf, strlen(buf)); } -#if defined(TARGET_I386) - -#include "target-i386/gdbstub.c" - -#elif defined (TARGET_PPC) +#if defined(TARGET_PPC) #if defined (TARGET_PPC64) #define GDB_CORE_XML "power64-core.xml" @@ -501,72 +493,14 @@ static int put_packet(GDBState *s, const char *buf) #define GDB_CORE_XML "power-core.xml" #endif -#include "target-ppc/gdbstub.c" - -#elif defined (TARGET_SPARC) - -#include "target-sparc/gdbstub.c" - #elif defined (TARGET_ARM) #define GDB_CORE_XML "arm-core.xml" -#include "target-arm/gdbstub.c" - #elif defined (TARGET_M68K) #define GDB_CORE_XML "cf-core.xml" -#include "target-m68k/gdbstub.c" - -#elif defined (TARGET_MIPS) - -#include "target-mips/gdbstub.c" - -#elif defined(TARGET_OPENRISC) - -#include "target-openrisc/gdbstub.c" - -#elif defined (TARGET_SH4) - -#include "target-sh4/gdbstub.c" - -#elif defined (TARGET_MICROBLAZE) - -#include "target-microblaze/gdbstub.c" - -#elif defined (TARGET_CRIS) - -#include "target-cris/gdbstub.c" - -#elif defined (TARGET_ALPHA) - -#include "target-alpha/gdbstub.c" - -#elif defined (TARGET_S390X) - -#include "target-s390x/gdbstub.c" - -#elif defined (TARGET_LM32) - -#include "target-lm32/gdbstub.c" - -#elif defined(TARGET_XTENSA) - -#include "target-xtensa/gdbstub.c" - -#else - -static int cpu_gdb_read_register(CPUArchState *env, uint8_t *mem_buf, int n) -{ - return 0; -} - -static int cpu_gdb_write_register(CPUArchState *env, uint8_t *mem_buf, int n) -{ - return 0; -} - #endif #ifdef GDB_CORE_XML @@ -642,7 +576,7 @@ static int gdb_read_register(CPUState *cpu, uint8_t *mem_buf, int reg) GDBRegisterState *r; if (reg < cc->gdb_num_core_regs) { - return cpu_gdb_read_register(env, mem_buf, reg); + return cc->gdb_read_register(cpu, mem_buf, reg); } for (r = cpu->gdb_regs; r; r = r->next) { @@ -660,7 +594,7 @@ static int gdb_write_register(CPUState *cpu, uint8_t *mem_buf, int reg) GDBRegisterState *r; if (reg < cc->gdb_num_core_regs) { - return cpu_gdb_write_register(env, mem_buf, reg); + return cc->gdb_write_register(cpu, mem_buf, reg); } for (r = cpu->gdb_regs; r; r = r->next) { @@ -1212,7 +1146,7 @@ static int gdb_handle_packet(GDBState *s, const char *line_buf) const char *xml; target_ulong total_len; - gdb_has_xml = 1; + gdb_has_xml = true; p += 19; xml = get_feature_xml(p, &p); if (!xml) { @@ -1621,7 +1555,7 @@ static void gdb_accept(void) s->c_cpu = first_cpu; s->g_cpu = first_cpu; s->fd = fd; - gdb_has_xml = 0; + gdb_has_xml = false; gdbserver_state = s; @@ -1707,7 +1641,7 @@ static void gdb_chr_event(void *opaque, int event) switch (event) { case CHR_EVENT_OPENED: vm_stop(RUN_STATE_PAUSED); - gdb_has_xml = 0; + gdb_has_xml = false; break; default: break; diff --git a/include/exec/gdbstub.h b/include/exec/gdbstub.h index a5bd341d55..a608a26c30 100644 --- a/include/exec/gdbstub.h +++ b/include/exec/gdbstub.h @@ -84,6 +84,14 @@ int gdbserver_start(int); int gdbserver_start(const char *port); #endif +/** + * gdb_has_xml: + * This is an ugly hack to cope with both new and old gdb. + * If gdb sends qXfer:features:read then assume we're talking to a newish + * gdb that understands target descriptions. + */ +extern bool gdb_has_xml; + /* in gdbstub-xml.c, generated by scripts/feature_to_c.sh */ extern const char *const xml_builtin[][2]; diff --git a/include/qom/cpu.h b/include/qom/cpu.h index 195fe593ea..c001474b6c 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -80,6 +80,8 @@ struct TranslationBlock; * @synchronize_from_tb: Callback for synchronizing state from a TCG * #TranslationBlock. * @get_phys_page_debug: Callback for obtaining a physical address. + * @gdb_read_register: Callback for letting GDB read a register. + * @gdb_write_register: Callback for letting GDB write a register. * @vmsd: State description for migration. * @gdb_num_core_regs: Number of core registers accessible to GDB. * @@ -109,6 +111,8 @@ typedef struct CPUClass { void (*set_pc)(CPUState *cpu, vaddr value); void (*synchronize_from_tb)(CPUState *cpu, struct TranslationBlock *tb); hwaddr (*get_phys_page_debug)(CPUState *cpu, vaddr addr); + int (*gdb_read_register)(CPUState *cpu, uint8_t *buf, int reg); + int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg); int (*write_elf64_note)(WriteCoreDumpFunction f, CPUState *cpu, int cpuid, void *opaque); diff --git a/qom/cpu.c b/qom/cpu.c index 2839ddf650..dbc9fb6489 100644 --- a/qom/cpu.c +++ b/qom/cpu.c @@ -157,6 +157,17 @@ static int cpu_common_write_elf64_note(WriteCoreDumpFunction f, } +static int cpu_common_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg) +{ + return 0; +} + +static int cpu_common_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg) +{ + return 0; +} + + void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, int flags) { @@ -253,6 +264,8 @@ static void cpu_class_init(ObjectClass *klass, void *data) k->write_elf32_note = cpu_common_write_elf32_note; k->write_elf64_qemunote = cpu_common_write_elf64_qemunote; k->write_elf64_note = cpu_common_write_elf64_note; + k->gdb_read_register = cpu_common_gdb_read_register; + k->gdb_write_register = cpu_common_gdb_write_register; dc->realize = cpu_common_realizefn; dc->no_user = 1; } diff --git a/target-alpha/Makefile.objs b/target-alpha/Makefile.objs index 590304cc61..b96c5da98d 100644 --- a/target-alpha/Makefile.objs +++ b/target-alpha/Makefile.objs @@ -1,3 +1,4 @@ obj-$(CONFIG_SOFTMMU) += machine.o obj-y += translate.o helper.o cpu.o obj-y += int_helper.o fpu_helper.o sys_helper.o mem_helper.o +obj-y += gdbstub.o diff --git a/target-alpha/cpu-qom.h b/target-alpha/cpu-qom.h index b2eeba36f3..2ebc9bcacb 100644 --- a/target-alpha/cpu-qom.h +++ b/target-alpha/cpu-qom.h @@ -82,5 +82,7 @@ void alpha_cpu_do_interrupt(CPUState *cpu); void alpha_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, int flags); hwaddr alpha_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); +int alpha_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); +int alpha_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); #endif diff --git a/target-alpha/cpu.c b/target-alpha/cpu.c index cc0f69a84a..64c70bc1e9 100644 --- a/target-alpha/cpu.c +++ b/target-alpha/cpu.c @@ -271,6 +271,8 @@ static void alpha_cpu_class_init(ObjectClass *oc, void *data) cc->do_interrupt = alpha_cpu_do_interrupt; cc->dump_state = alpha_cpu_dump_state; cc->set_pc = alpha_cpu_set_pc; + cc->gdb_read_register = alpha_cpu_gdb_read_register; + cc->gdb_write_register = alpha_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY cc->do_unassigned_access = alpha_cpu_unassigned_access; cc->get_phys_page_debug = alpha_cpu_get_phys_page_debug; diff --git a/target-alpha/gdbstub.c b/target-alpha/gdbstub.c index 1c18698aa6..980f140e72 100644 --- a/target-alpha/gdbstub.c +++ b/target-alpha/gdbstub.c @@ -17,9 +17,14 @@ * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, see . */ +#include "config.h" +#include "qemu-common.h" +#include "exec/gdbstub.h" -static int cpu_gdb_read_register(CPUAlphaState *env, uint8_t *mem_buf, int n) +int alpha_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n) { + AlphaCPU *cpu = ALPHA_CPU(cs); + CPUAlphaState *env = &cpu->env; uint64_t val; CPU_DoubleU d; @@ -52,8 +57,10 @@ static int cpu_gdb_read_register(CPUAlphaState *env, uint8_t *mem_buf, int n) return gdb_get_regl(mem_buf, val); } -static int cpu_gdb_write_register(CPUAlphaState *env, uint8_t *mem_buf, int n) +int alpha_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) { + AlphaCPU *cpu = ALPHA_CPU(cs); + CPUAlphaState *env = &cpu->env; target_ulong tmp = ldtul_p(mem_buf); CPU_DoubleU d; diff --git a/target-arm/Makefile.objs b/target-arm/Makefile.objs index 4a6e52e528..2d9f77fa9b 100644 --- a/target-arm/Makefile.objs +++ b/target-arm/Makefile.objs @@ -4,3 +4,4 @@ obj-$(CONFIG_KVM) += kvm.o obj-$(CONFIG_NO_KVM) += kvm-stub.o obj-y += translate.o op_helper.o helper.o cpu.o obj-y += neon_helper.o iwmmxt_helper.o +obj-y += gdbstub.o diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h index 02162c9aba..cf3658714e 100644 --- a/target-arm/cpu-qom.h +++ b/target-arm/cpu-qom.h @@ -149,4 +149,7 @@ void arm_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, hwaddr arm_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); +int arm_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); +int arm_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); + #endif diff --git a/target-arm/cpu.c b/target-arm/cpu.c index f39c19f162..a493cc2239 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -824,6 +824,8 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data) cc->do_interrupt = arm_cpu_do_interrupt; cc->dump_state = arm_cpu_dump_state; cc->set_pc = arm_cpu_set_pc; + cc->gdb_read_register = arm_cpu_gdb_read_register; + cc->gdb_write_register = arm_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY cc->get_phys_page_debug = arm_cpu_get_phys_page_debug; cc->vmsd = &vmstate_arm_cpu; diff --git a/target-arm/gdbstub.c b/target-arm/gdbstub.c index e1c7df4149..1c3439654f 100644 --- a/target-arm/gdbstub.c +++ b/target-arm/gdbstub.c @@ -17,6 +17,9 @@ * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, see . */ +#include "config.h" +#include "qemu-common.h" +#include "exec/gdbstub.h" /* Old gdb always expect FPA registers. Newer (xml-aware) gdb only expect whatever the target description contains. Due to a historical mishap @@ -24,8 +27,11 @@ We hack round this by giving the FPA regs zero size when talking to a newer gdb. */ -static int cpu_gdb_read_register(CPUARMState *env, uint8_t *mem_buf, int n) +int arm_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n) { + ARMCPU *cpu = ARM_CPU(cs); + CPUARMState *env = &cpu->env; + if (n < 16) { /* Core integer register. */ return gdb_get_reg32(mem_buf, env->regs[n]); @@ -53,8 +59,10 @@ static int cpu_gdb_read_register(CPUARMState *env, uint8_t *mem_buf, int n) return 0; } -static int cpu_gdb_write_register(CPUARMState *env, uint8_t *mem_buf, int n) +int arm_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) { + ARMCPU *cpu = ARM_CPU(cs); + CPUARMState *env = &cpu->env; uint32_t tmp; tmp = ldl_p(mem_buf); diff --git a/target-cris/Makefile.objs b/target-cris/Makefile.objs index afb87bcc80..7779227fc4 100644 --- a/target-cris/Makefile.objs +++ b/target-cris/Makefile.objs @@ -1,2 +1,3 @@ obj-y += translate.o op_helper.o helper.o cpu.o +obj-y += gdbstub.o obj-$(CONFIG_SOFTMMU) += mmu.o machine.o diff --git a/target-cris/cpu-qom.h b/target-cris/cpu-qom.h index d7baf0746a..3e92ea011d 100644 --- a/target-cris/cpu-qom.h +++ b/target-cris/cpu-qom.h @@ -81,4 +81,7 @@ void cris_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, hwaddr cris_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); +int cris_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); +int cris_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); + #endif diff --git a/target-cris/cpu.c b/target-cris/cpu.c index 31eeddf822..8fcc95d994 100644 --- a/target-cris/cpu.c +++ b/target-cris/cpu.c @@ -255,6 +255,8 @@ static void cris_cpu_class_init(ObjectClass *oc, void *data) cc->do_interrupt = cris_cpu_do_interrupt; cc->dump_state = cris_cpu_dump_state; cc->set_pc = cris_cpu_set_pc; + cc->gdb_read_register = cris_cpu_gdb_read_register; + cc->gdb_write_register = cris_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY cc->get_phys_page_debug = cris_cpu_get_phys_page_debug; #endif diff --git a/target-cris/gdbstub.c b/target-cris/gdbstub.c index ed23966c91..958a370e06 100644 --- a/target-cris/gdbstub.c +++ b/target-cris/gdbstub.c @@ -17,6 +17,9 @@ * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, see . */ +#include "config.h" +#include "qemu-common.h" +#include "exec/gdbstub.h" static int read_register_crisv10(CPUCRISState *env, uint8_t *mem_buf, int n) @@ -48,8 +51,10 @@ read_register_crisv10(CPUCRISState *env, uint8_t *mem_buf, int n) return 0; } -static int cpu_gdb_read_register(CPUCRISState *env, uint8_t *mem_buf, int n) +int cris_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n) { + CRISCPU *cpu = CRIS_CPU(cs); + CPUCRISState *env = &cpu->env; uint8_t srs; if (env->pregs[PR_VR] < 32) { @@ -85,8 +90,10 @@ static int cpu_gdb_read_register(CPUCRISState *env, uint8_t *mem_buf, int n) return 0; } -static int cpu_gdb_write_register(CPUCRISState *env, uint8_t *mem_buf, int n) +int cris_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) { + CRISCPU *cpu = CRIS_CPU(cs); + CPUCRISState *env = &cpu->env; uint32_t tmp; if (n > 49) { diff --git a/target-i386/Makefile.objs b/target-i386/Makefile.objs index c1d4f059da..3b629d4d39 100644 --- a/target-i386/Makefile.objs +++ b/target-i386/Makefile.objs @@ -1,6 +1,7 @@ obj-y += translate.o helper.o cpu.o obj-y += excp_helper.o fpu_helper.o cc_helper.o int_helper.o svm_helper.o obj-y += smm_helper.o misc_helper.o mem_helper.o seg_helper.o +obj-y += gdbstub.o obj-$(CONFIG_SOFTMMU) += machine.o arch_memory_mapping.o arch_dump.o obj-$(CONFIG_KVM) += kvm.o hyperv.o obj-$(CONFIG_NO_KVM) += kvm-stub.o diff --git a/target-i386/cpu-qom.h b/target-i386/cpu-qom.h index d928562c53..60d2b5d772 100644 --- a/target-i386/cpu-qom.h +++ b/target-i386/cpu-qom.h @@ -106,4 +106,7 @@ void x86_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, hwaddr x86_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); +int x86_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); +int x86_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); + #endif diff --git a/target-i386/cpu.c b/target-i386/cpu.c index df9832e151..2b59b7d7ef 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -2538,6 +2538,8 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data) cc->dump_state = x86_cpu_dump_state; cc->set_pc = x86_cpu_set_pc; cc->synchronize_from_tb = x86_cpu_synchronize_from_tb; + cc->gdb_read_register = x86_cpu_gdb_read_register; + cc->gdb_write_register = x86_cpu_gdb_write_register; cc->get_arch_id = x86_cpu_get_arch_id; cc->get_paging_enabled = x86_cpu_get_paging_enabled; #ifndef CONFIG_USER_ONLY diff --git a/target-i386/gdbstub.c b/target-i386/gdbstub.c index 0a4d97d24c..15bebeff89 100644 --- a/target-i386/gdbstub.c +++ b/target-i386/gdbstub.c @@ -17,6 +17,9 @@ * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, see . */ +#include "config.h" +#include "qemu-common.h" +#include "exec/gdbstub.h" #ifdef TARGET_X86_64 static const int gpr_map[16] = { @@ -35,8 +38,11 @@ static const int gpr_map32[8] = { 0, 1, 2, 3, 4, 5, 6, 7 }; #define IDX_XMM_REGS (IDX_FP_REGS + 16) #define IDX_MXCSR_REG (IDX_XMM_REGS + CPU_NB_REGS) -static int cpu_gdb_read_register(CPUX86State *env, uint8_t *mem_buf, int n) +int x86_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n) { + X86CPU *cpu = X86_CPU(cs); + CPUX86State *env = &cpu->env; + if (n < CPU_NB_REGS) { if (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK) { return gdb_get_reg64(mem_buf, env->regs[gpr_map[n]]); @@ -108,8 +114,9 @@ static int cpu_gdb_read_register(CPUX86State *env, uint8_t *mem_buf, int n) return 0; } -static int cpu_x86_gdb_load_seg(CPUX86State *env, int sreg, uint8_t *mem_buf) +static int x86_cpu_gdb_load_seg(X86CPU *cpu, int sreg, uint8_t *mem_buf) { + CPUX86State *env = &cpu->env; uint16_t selector = ldl_p(mem_buf); if (selector != env->segs[sreg].selector) { @@ -135,8 +142,10 @@ static int cpu_x86_gdb_load_seg(CPUX86State *env, int sreg, uint8_t *mem_buf) return 4; } -static int cpu_gdb_write_register(CPUX86State *env, uint8_t *mem_buf, int n) +int x86_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) { + X86CPU *cpu = X86_CPU(cs); + CPUX86State *env = &cpu->env; uint32_t tmp; if (n < CPU_NB_REGS) { @@ -179,17 +188,17 @@ static int cpu_gdb_write_register(CPUX86State *env, uint8_t *mem_buf, int n) return 4; case IDX_SEG_REGS: - return cpu_x86_gdb_load_seg(env, R_CS, mem_buf); + return x86_cpu_gdb_load_seg(cpu, R_CS, mem_buf); case IDX_SEG_REGS + 1: - return cpu_x86_gdb_load_seg(env, R_SS, mem_buf); + return x86_cpu_gdb_load_seg(cpu, R_SS, mem_buf); case IDX_SEG_REGS + 2: - return cpu_x86_gdb_load_seg(env, R_DS, mem_buf); + return x86_cpu_gdb_load_seg(cpu, R_DS, mem_buf); case IDX_SEG_REGS + 3: - return cpu_x86_gdb_load_seg(env, R_ES, mem_buf); + return x86_cpu_gdb_load_seg(cpu, R_ES, mem_buf); case IDX_SEG_REGS + 4: - return cpu_x86_gdb_load_seg(env, R_FS, mem_buf); + return x86_cpu_gdb_load_seg(cpu, R_FS, mem_buf); case IDX_SEG_REGS + 5: - return cpu_x86_gdb_load_seg(env, R_GS, mem_buf); + return x86_cpu_gdb_load_seg(cpu, R_GS, mem_buf); case IDX_FP_REGS + 8: env->fpuc = ldl_p(mem_buf); diff --git a/target-lm32/Makefile.objs b/target-lm32/Makefile.objs index ca20f21443..40236876c8 100644 --- a/target-lm32/Makefile.objs +++ b/target-lm32/Makefile.objs @@ -1,2 +1,3 @@ obj-y += translate.o op_helper.o helper.o cpu.o +obj-y += gdbstub.o obj-$(CONFIG_SOFTMMU) += machine.o diff --git a/target-lm32/cpu-qom.h b/target-lm32/cpu-qom.h index 9e2732919d..723f6049c3 100644 --- a/target-lm32/cpu-qom.h +++ b/target-lm32/cpu-qom.h @@ -79,5 +79,7 @@ void lm32_cpu_do_interrupt(CPUState *cpu); void lm32_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, int flags); hwaddr lm32_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); +int lm32_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); +int lm32_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); #endif diff --git a/target-lm32/cpu.c b/target-lm32/cpu.c index aa52696cda..962d553de0 100644 --- a/target-lm32/cpu.c +++ b/target-lm32/cpu.c @@ -87,6 +87,8 @@ static void lm32_cpu_class_init(ObjectClass *oc, void *data) cc->do_interrupt = lm32_cpu_do_interrupt; cc->dump_state = lm32_cpu_dump_state; cc->set_pc = lm32_cpu_set_pc; + cc->gdb_read_register = lm32_cpu_gdb_read_register; + cc->gdb_write_register = lm32_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY cc->get_phys_page_debug = lm32_cpu_get_phys_page_debug; cc->vmsd = &vmstate_lm32_cpu; diff --git a/target-lm32/gdbstub.c b/target-lm32/gdbstub.c index 17f08f5d94..4979a98d74 100644 --- a/target-lm32/gdbstub.c +++ b/target-lm32/gdbstub.c @@ -17,10 +17,16 @@ * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, see . */ +#include "config.h" +#include "qemu-common.h" +#include "exec/gdbstub.h" #include "hw/lm32/lm32_pic.h" -static int cpu_gdb_read_register(CPULM32State *env, uint8_t *mem_buf, int n) +int lm32_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n) { + LM32CPU *cpu = LM32_CPU(cs); + CPULM32State *env = &cpu->env; + if (n < 32) { return gdb_get_reg32(mem_buf, env->regs[n]); } else { @@ -45,10 +51,11 @@ static int cpu_gdb_read_register(CPULM32State *env, uint8_t *mem_buf, int n) return 0; } -static int cpu_gdb_write_register(CPULM32State *env, uint8_t *mem_buf, int n) +int lm32_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) { - LM32CPU *cpu = lm32_env_get_cpu(env); - CPUClass *cc = CPU_GET_CLASS(cpu); + LM32CPU *cpu = LM32_CPU(cs); + CPUClass *cc = CPU_GET_CLASS(cs); + CPULM32State *env = &cpu->env; uint32_t tmp; if (n > cc->gdb_num_core_regs) { diff --git a/target-m68k/Makefile.objs b/target-m68k/Makefile.objs index 2e2b85044d..02cf616a78 100644 --- a/target-m68k/Makefile.objs +++ b/target-m68k/Makefile.objs @@ -1,2 +1,3 @@ obj-y += m68k-semi.o obj-y += translate.o op_helper.o helper.o cpu.o +obj-y += gdbstub.o diff --git a/target-m68k/cpu-qom.h b/target-m68k/cpu-qom.h index 7115707e91..7f388eda68 100644 --- a/target-m68k/cpu-qom.h +++ b/target-m68k/cpu-qom.h @@ -74,5 +74,7 @@ void m68k_cpu_do_interrupt(CPUState *cpu); void m68k_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, int flags); hwaddr m68k_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); +int m68k_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); +int m68k_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); #endif diff --git a/target-m68k/cpu.c b/target-m68k/cpu.c index 93200d9964..01a70f194d 100644 --- a/target-m68k/cpu.c +++ b/target-m68k/cpu.c @@ -190,6 +190,8 @@ static void m68k_cpu_class_init(ObjectClass *c, void *data) cc->do_interrupt = m68k_cpu_do_interrupt; cc->dump_state = m68k_cpu_dump_state; cc->set_pc = m68k_cpu_set_pc; + cc->gdb_read_register = m68k_cpu_gdb_read_register; + cc->gdb_write_register = m68k_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY cc->get_phys_page_debug = m68k_cpu_get_phys_page_debug; #endif diff --git a/target-m68k/gdbstub.c b/target-m68k/gdbstub.c index 9fa9fa6a1f..ae8179c016 100644 --- a/target-m68k/gdbstub.c +++ b/target-m68k/gdbstub.c @@ -17,9 +17,15 @@ * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, see . */ +#include "config.h" +#include "qemu-common.h" +#include "exec/gdbstub.h" -static int cpu_gdb_read_register(CPUM68KState *env, uint8_t *mem_buf, int n) +int m68k_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n) { + M68kCPU *cpu = M68K_CPU(cs); + CPUM68KState *env = &cpu->env; + if (n < 8) { /* D0-D7 */ return gdb_get_reg32(mem_buf, env->dregs[n]); @@ -39,8 +45,10 @@ static int cpu_gdb_read_register(CPUM68KState *env, uint8_t *mem_buf, int n) return 0; } -static int cpu_gdb_write_register(CPUM68KState *env, uint8_t *mem_buf, int n) +int m68k_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) { + M68kCPU *cpu = M68K_CPU(cs); + CPUM68KState *env = &cpu->env; uint32_t tmp; tmp = ldl_p(mem_buf); diff --git a/target-microblaze/Makefile.objs b/target-microblaze/Makefile.objs index 985330eac5..f3d7b44c89 100644 --- a/target-microblaze/Makefile.objs +++ b/target-microblaze/Makefile.objs @@ -1,2 +1,3 @@ obj-y += translate.o op_helper.o helper.o cpu.o +obj-y += gdbstub.o obj-$(CONFIG_SOFTMMU) += mmu.o diff --git a/target-microblaze/cpu-qom.h b/target-microblaze/cpu-qom.h index 1318a36676..35a12b42a5 100644 --- a/target-microblaze/cpu-qom.h +++ b/target-microblaze/cpu-qom.h @@ -75,5 +75,7 @@ void mb_cpu_do_interrupt(CPUState *cs); void mb_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, int flags); hwaddr mb_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); +int mb_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); +int mb_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); #endif diff --git a/target-microblaze/cpu.c b/target-microblaze/cpu.c index 758b0cb07d..c75d1bd642 100644 --- a/target-microblaze/cpu.c +++ b/target-microblaze/cpu.c @@ -141,6 +141,8 @@ static void mb_cpu_class_init(ObjectClass *oc, void *data) cc->do_interrupt = mb_cpu_do_interrupt; cc->dump_state = mb_cpu_dump_state; cc->set_pc = mb_cpu_set_pc; + cc->gdb_read_register = mb_cpu_gdb_read_register; + cc->gdb_write_register = mb_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY cc->do_unassigned_access = mb_cpu_unassigned_access; cc->get_phys_page_debug = mb_cpu_get_phys_page_debug; diff --git a/target-microblaze/gdbstub.c b/target-microblaze/gdbstub.c index 678de21b5f..a70e2ee3cb 100644 --- a/target-microblaze/gdbstub.c +++ b/target-microblaze/gdbstub.c @@ -17,9 +17,15 @@ * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, see . */ +#include "config.h" +#include "qemu-common.h" +#include "exec/gdbstub.h" -static int cpu_gdb_read_register(CPUMBState *env, uint8_t *mem_buf, int n) +int mb_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n) { + MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs); + CPUMBState *env = &cpu->env; + if (n < 32) { return gdb_get_reg32(mem_buf, env->regs[n]); } else { @@ -28,10 +34,11 @@ static int cpu_gdb_read_register(CPUMBState *env, uint8_t *mem_buf, int n) return 0; } -static int cpu_gdb_write_register(CPUMBState *env, uint8_t *mem_buf, int n) +int mb_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) { - MicroBlazeCPU *cpu = mb_env_get_cpu(env); - CPUClass *cc = CPU_GET_CLASS(cpu); + MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs); + CPUClass *cc = CPU_GET_CLASS(cs); + CPUMBState *env = &cpu->env; uint32_t tmp; if (n > cc->gdb_num_core_regs) { diff --git a/target-mips/Makefile.objs b/target-mips/Makefile.objs index 119c816518..0277d56e82 100644 --- a/target-mips/Makefile.objs +++ b/target-mips/Makefile.objs @@ -1,2 +1,3 @@ obj-y += translate.o dsp_helper.o op_helper.o lmi_helper.o helper.o cpu.o +obj-y += gdbstub.o obj-$(CONFIG_SOFTMMU) += machine.o diff --git a/target-mips/cpu-qom.h b/target-mips/cpu-qom.h index 7c8e616392..8877f813f7 100644 --- a/target-mips/cpu-qom.h +++ b/target-mips/cpu-qom.h @@ -78,5 +78,7 @@ void mips_cpu_do_interrupt(CPUState *cpu); void mips_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, int flags); hwaddr mips_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); +int mips_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); +int mips_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); #endif diff --git a/target-mips/cpu.c b/target-mips/cpu.c index e667fb7b7c..f81f9e9409 100644 --- a/target-mips/cpu.c +++ b/target-mips/cpu.c @@ -100,6 +100,8 @@ static void mips_cpu_class_init(ObjectClass *c, void *data) cc->dump_state = mips_cpu_dump_state; cc->set_pc = mips_cpu_set_pc; cc->synchronize_from_tb = mips_cpu_synchronize_from_tb; + cc->gdb_read_register = mips_cpu_gdb_read_register; + cc->gdb_write_register = mips_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY cc->do_unassigned_access = mips_cpu_unassigned_access; cc->get_phys_page_debug = mips_cpu_get_phys_page_debug; diff --git a/target-mips/gdbstub.c b/target-mips/gdbstub.c index db826d8516..5b72d58a44 100644 --- a/target-mips/gdbstub.c +++ b/target-mips/gdbstub.c @@ -17,9 +17,15 @@ * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, see . */ +#include "config.h" +#include "qemu-common.h" +#include "exec/gdbstub.h" -static int cpu_gdb_read_register(CPUMIPSState *env, uint8_t *mem_buf, int n) +int mips_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n) { + MIPSCPU *cpu = MIPS_CPU(cs); + CPUMIPSState *env = &cpu->env; + if (n < 32) { return gdb_get_regl(mem_buf, env->active_tc.gpr[n]); } @@ -78,8 +84,10 @@ static unsigned int ieee_rm[] = { set_float_rounding_mode(ieee_rm[env->active_fpu.fcr31 & 3], \ &env->active_fpu.fp_status) -static int cpu_gdb_write_register(CPUMIPSState *env, uint8_t *mem_buf, int n) +int mips_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) { + MIPSCPU *cpu = MIPS_CPU(cs); + CPUMIPSState *env = &cpu->env; target_ulong tmp; tmp = ldtul_p(mem_buf); diff --git a/target-openrisc/Makefile.objs b/target-openrisc/Makefile.objs index 44dc5399df..397d01650e 100644 --- a/target-openrisc/Makefile.objs +++ b/target-openrisc/Makefile.objs @@ -2,3 +2,4 @@ obj-$(CONFIG_SOFTMMU) += machine.o obj-y += cpu.o exception.o interrupt.o mmu.o translate.o obj-y += exception_helper.o fpu_helper.o int_helper.o \ interrupt_helper.o mmu_helper.o sys_helper.o +obj-y += gdbstub.o diff --git a/target-openrisc/cpu.c b/target-openrisc/cpu.c index 9b042e14b0..aa269fb7a6 100644 --- a/target-openrisc/cpu.c +++ b/target-openrisc/cpu.c @@ -155,6 +155,8 @@ static void openrisc_cpu_class_init(ObjectClass *oc, void *data) cc->do_interrupt = openrisc_cpu_do_interrupt; cc->dump_state = openrisc_cpu_dump_state; cc->set_pc = openrisc_cpu_set_pc; + cc->gdb_read_register = openrisc_cpu_gdb_read_register; + cc->gdb_write_register = openrisc_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY cc->get_phys_page_debug = openrisc_cpu_get_phys_page_debug; dc->vmsd = &vmstate_openrisc_cpu; diff --git a/target-openrisc/cpu.h b/target-openrisc/cpu.h index 3ddb7674c7..8fd0bc0bf0 100644 --- a/target-openrisc/cpu.h +++ b/target-openrisc/cpu.h @@ -350,6 +350,8 @@ void openrisc_cpu_do_interrupt(CPUState *cpu); void openrisc_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, int flags); hwaddr openrisc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); +int openrisc_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); +int openrisc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); void openrisc_translate_init(void); int cpu_openrisc_handle_mmu_fault(CPUOpenRISCState *env, target_ulong address, diff --git a/target-openrisc/gdbstub.c b/target-openrisc/gdbstub.c index bdb8d2c73f..18bcc46167 100644 --- a/target-openrisc/gdbstub.c +++ b/target-openrisc/gdbstub.c @@ -17,9 +17,15 @@ * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, see . */ +#include "config.h" +#include "qemu-common.h" +#include "exec/gdbstub.h" -static int cpu_gdb_read_register(CPUOpenRISCState *env, uint8_t *mem_buf, int n) +int openrisc_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n) { + OpenRISCCPU *cpu = OPENRISC_CPU(cs); + CPUOpenRISCState *env = &cpu->env; + if (n < 32) { return gdb_get_reg32(mem_buf, env->gpr[n]); } else { @@ -40,11 +46,11 @@ static int cpu_gdb_read_register(CPUOpenRISCState *env, uint8_t *mem_buf, int n) return 0; } -static int cpu_gdb_write_register(CPUOpenRISCState *env, - uint8_t *mem_buf, int n) +int openrisc_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) { - OpenRISCCPU *cpu = openrisc_env_get_cpu(env); - CPUClass *cc = CPU_GET_CLASS(cpu); + OpenRISCCPU *cpu = OPENRISC_CPU(cs); + CPUClass *cc = CPU_GET_CLASS(cs); + CPUOpenRISCState *env = &cpu->env; uint32_t tmp; if (n > cc->gdb_num_core_regs) { diff --git a/target-ppc/Makefile.objs b/target-ppc/Makefile.objs index 6e78cb3624..f72e3993f7 100644 --- a/target-ppc/Makefile.objs +++ b/target-ppc/Makefile.objs @@ -13,3 +13,4 @@ obj-y += timebase_helper.o obj-y += misc_helper.o obj-y += mem_helper.o obj-$(CONFIG_USER_ONLY) += user_only_helper.o +obj-y += gdbstub.o diff --git a/target-ppc/cpu-qom.h b/target-ppc/cpu-qom.h index 3341c5151d..fc0d737880 100644 --- a/target-ppc/cpu-qom.h +++ b/target-ppc/cpu-qom.h @@ -106,5 +106,7 @@ void ppc_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, void ppc_cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, int flags); hwaddr ppc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); +int ppc_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); +int ppc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); #endif diff --git a/target-ppc/gdbstub.c b/target-ppc/gdbstub.c index 40a9d7b6d4..1c910902ea 100644 --- a/target-ppc/gdbstub.c +++ b/target-ppc/gdbstub.c @@ -17,6 +17,9 @@ * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, see . */ +#include "config.h" +#include "qemu-common.h" +#include "exec/gdbstub.h" /* Old gdb always expects FP registers. Newer (xml-aware) gdb only * expects whatever the target description contains. Due to a @@ -25,8 +28,11 @@ * FP regs zero size when talking to a newer gdb. */ -static int cpu_gdb_read_register(CPUPPCState *env, uint8_t *mem_buf, int n) +int ppc_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n) { + PowerPCCPU *cpu = POWERPC_CPU(cs); + CPUPPCState *env = &cpu->env; + if (n < 32) { /* gprs */ return gdb_get_regl(mem_buf, env->gpr[n]); @@ -70,8 +76,11 @@ static int cpu_gdb_read_register(CPUPPCState *env, uint8_t *mem_buf, int n) return 0; } -static int cpu_gdb_write_register(CPUPPCState *env, uint8_t *mem_buf, int n) +int ppc_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) { + PowerPCCPU *cpu = POWERPC_CPU(cs); + CPUPPCState *env = &cpu->env; + if (n < 32) { /* gprs */ env->gpr[n] = ldtul_p(mem_buf); diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 91161939c0..370d243b52 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -8458,6 +8458,8 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data) cc->dump_state = ppc_cpu_dump_state; cc->dump_statistics = ppc_cpu_dump_statistics; cc->set_pc = ppc_cpu_set_pc; + cc->gdb_read_register = ppc_cpu_gdb_read_register; + cc->gdb_write_register = ppc_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY cc->get_phys_page_debug = ppc_cpu_get_phys_page_debug; #endif diff --git a/target-s390x/Makefile.objs b/target-s390x/Makefile.objs index 4e634173a4..ab938e7ad8 100644 --- a/target-s390x/Makefile.objs +++ b/target-s390x/Makefile.objs @@ -1,4 +1,5 @@ obj-y += translate.o helper.o cpu.o interrupt.o obj-y += int_helper.o fpu_helper.o cc_helper.o mem_helper.o misc_helper.o +obj-y += gdbstub.o obj-$(CONFIG_SOFTMMU) += ioinst.o obj-$(CONFIG_KVM) += kvm.o diff --git a/target-s390x/cpu-qom.h b/target-s390x/cpu-qom.h index a4fe8fb5fc..0d63b1cf20 100644 --- a/target-s390x/cpu-qom.h +++ b/target-s390x/cpu-qom.h @@ -75,5 +75,7 @@ void s390_cpu_do_interrupt(CPUState *cpu); void s390_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, int flags); hwaddr s390_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); +int s390_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); +int s390_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); #endif diff --git a/target-s390x/cpu.c b/target-s390x/cpu.c index 8f99d7c86c..1d16da3787 100644 --- a/target-s390x/cpu.c +++ b/target-s390x/cpu.c @@ -173,6 +173,8 @@ static void s390_cpu_class_init(ObjectClass *oc, void *data) cc->do_interrupt = s390_cpu_do_interrupt; cc->dump_state = s390_cpu_dump_state; cc->set_pc = s390_cpu_set_pc; + cc->gdb_read_register = s390_cpu_gdb_read_register; + cc->gdb_write_register = s390_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY cc->get_phys_page_debug = s390_cpu_get_phys_page_debug; #endif diff --git a/target-s390x/gdbstub.c b/target-s390x/gdbstub.c index ee3e984a32..a129742e2f 100644 --- a/target-s390x/gdbstub.c +++ b/target-s390x/gdbstub.c @@ -17,9 +17,15 @@ * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, see . */ +#include "config.h" +#include "qemu-common.h" +#include "exec/gdbstub.h" +#include "qemu/bitops.h" -static int cpu_gdb_read_register(CPUS390XState *env, uint8_t *mem_buf, int n) +int s390_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n) { + S390CPU *cpu = S390_CPU(cs); + CPUS390XState *env = &cpu->env; uint64_t val; int cc_op; @@ -43,8 +49,10 @@ static int cpu_gdb_read_register(CPUS390XState *env, uint8_t *mem_buf, int n) return 0; } -static int cpu_gdb_write_register(CPUS390XState *env, uint8_t *mem_buf, int n) +int s390_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) { + S390CPU *cpu = S390_CPU(cs); + CPUS390XState *env = &cpu->env; target_ulong tmpl; uint32_t tmp32; int r = 8; diff --git a/target-sh4/Makefile.objs b/target-sh4/Makefile.objs index cb448a840f..a285358adf 100644 --- a/target-sh4/Makefile.objs +++ b/target-sh4/Makefile.objs @@ -1 +1,2 @@ obj-y += translate.o op_helper.o helper.o cpu.o +obj-y += gdbstub.o diff --git a/target-sh4/cpu-qom.h b/target-sh4/cpu-qom.h index 7c9160bab8..c04e78631b 100644 --- a/target-sh4/cpu-qom.h +++ b/target-sh4/cpu-qom.h @@ -87,5 +87,7 @@ void superh_cpu_do_interrupt(CPUState *cpu); void superh_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, int flags); hwaddr superh_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); +int superh_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); +int superh_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); #endif diff --git a/target-sh4/cpu.c b/target-sh4/cpu.c index 35f0535436..bda3c5112c 100644 --- a/target-sh4/cpu.c +++ b/target-sh4/cpu.c @@ -286,6 +286,8 @@ static void superh_cpu_class_init(ObjectClass *oc, void *data) cc->dump_state = superh_cpu_dump_state; cc->set_pc = superh_cpu_set_pc; cc->synchronize_from_tb = superh_cpu_synchronize_from_tb; + cc->gdb_read_register = superh_cpu_gdb_read_register; + cc->gdb_write_register = superh_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY cc->get_phys_page_debug = superh_cpu_get_phys_page_debug; #endif diff --git a/target-sh4/gdbstub.c b/target-sh4/gdbstub.c index fb85718fc0..df4fa2af76 100644 --- a/target-sh4/gdbstub.c +++ b/target-sh4/gdbstub.c @@ -17,12 +17,18 @@ * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, see . */ +#include "config.h" +#include "qemu-common.h" +#include "exec/gdbstub.h" /* Hint: Use "set architecture sh4" in GDB to see fpu registers */ /* FIXME: We should use XML for this. */ -static int cpu_gdb_read_register(CPUSH4State *env, uint8_t *mem_buf, int n) +int superh_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n) { + SuperHCPU *cpu = SUPERH_CPU(cs); + CPUSH4State *env = &cpu->env; + switch (n) { case 0 ... 7: if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) { @@ -70,8 +76,11 @@ static int cpu_gdb_read_register(CPUSH4State *env, uint8_t *mem_buf, int n) return 0; } -static int cpu_gdb_write_register(CPUSH4State *env, uint8_t *mem_buf, int n) +int superh_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) { + SuperHCPU *cpu = SUPERH_CPU(cs); + CPUSH4State *env = &cpu->env; + switch (n) { case 0 ... 7: if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) { diff --git a/target-sparc/Makefile.objs b/target-sparc/Makefile.objs index 9fc42ea9b0..1cd81cccc3 100644 --- a/target-sparc/Makefile.objs +++ b/target-sparc/Makefile.objs @@ -4,3 +4,4 @@ obj-y += fop_helper.o cc_helper.o win_helper.o mmu_helper.o ldst_helper.o obj-$(TARGET_SPARC) += int32_helper.o obj-$(TARGET_SPARC64) += int64_helper.o obj-$(TARGET_SPARC64) += vis_helper.o +obj-y += gdbstub.o diff --git a/target-sparc/cpu-qom.h b/target-sparc/cpu-qom.h index 39d975b5fc..8e3e0de277 100644 --- a/target-sparc/cpu-qom.h +++ b/target-sparc/cpu-qom.h @@ -79,5 +79,7 @@ void sparc_cpu_do_interrupt(CPUState *cpu); void sparc_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, int flags); hwaddr sparc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); +int sparc_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); +int sparc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); #endif diff --git a/target-sparc/cpu.c b/target-sparc/cpu.c index 388a632d18..c7b4a90663 100644 --- a/target-sparc/cpu.c +++ b/target-sparc/cpu.c @@ -787,6 +787,8 @@ static void sparc_cpu_class_init(ObjectClass *oc, void *data) #endif cc->set_pc = sparc_cpu_set_pc; cc->synchronize_from_tb = sparc_cpu_synchronize_from_tb; + cc->gdb_read_register = sparc_cpu_gdb_read_register; + cc->gdb_write_register = sparc_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY cc->do_unassigned_access = sparc_cpu_unassigned_access; cc->get_phys_page_debug = sparc_cpu_get_phys_page_debug; diff --git a/target-sparc/gdbstub.c b/target-sparc/gdbstub.c index 460c0b7197..3de3242b29 100644 --- a/target-sparc/gdbstub.c +++ b/target-sparc/gdbstub.c @@ -17,6 +17,9 @@ * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, see . */ +#include "config.h" +#include "qemu-common.h" +#include "exec/gdbstub.h" #ifdef TARGET_ABI32 #define gdb_get_rega(buf, val) gdb_get_reg32(buf, val) @@ -24,8 +27,11 @@ #define gdb_get_rega(buf, val) gdb_get_regl(buf, val) #endif -static int cpu_gdb_read_register(CPUSPARCState *env, uint8_t *mem_buf, int n) +int sparc_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n) { + SPARCCPU *cpu = SPARC_CPU(cs); + CPUSPARCState *env = &cpu->env; + if (n < 8) { /* g0..g7 */ return gdb_get_rega(mem_buf, env->gregs[n]); @@ -98,8 +104,10 @@ static int cpu_gdb_read_register(CPUSPARCState *env, uint8_t *mem_buf, int n) return 0; } -static int cpu_gdb_write_register(CPUSPARCState *env, uint8_t *mem_buf, int n) +int sparc_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) { + SPARCCPU *cpu = SPARC_CPU(cs); + CPUSPARCState *env = &cpu->env; #if defined(TARGET_ABI32) abi_ulong tmp; diff --git a/target-xtensa/Makefile.objs b/target-xtensa/Makefile.objs index 644b7f99bb..5c150a870f 100644 --- a/target-xtensa/Makefile.objs +++ b/target-xtensa/Makefile.objs @@ -3,3 +3,4 @@ obj-y += core-dc232b.o obj-y += core-dc233c.o obj-y += core-fsf.o obj-y += translate.o op_helper.o helper.o cpu.o +obj-y += gdbstub.o diff --git a/target-xtensa/cpu-qom.h b/target-xtensa/cpu-qom.h index 1b9479eb9c..c6cc2d91f4 100644 --- a/target-xtensa/cpu-qom.h +++ b/target-xtensa/cpu-qom.h @@ -87,5 +87,7 @@ void xtensa_cpu_do_interrupt(CPUState *cpu); void xtensa_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, int flags); hwaddr xtensa_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); +int xtensa_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); +int xtensa_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); #endif diff --git a/target-xtensa/cpu.c b/target-xtensa/cpu.c index 560fa0c058..e966aa0a79 100644 --- a/target-xtensa/cpu.c +++ b/target-xtensa/cpu.c @@ -133,6 +133,8 @@ static void xtensa_cpu_class_init(ObjectClass *oc, void *data) cc->do_interrupt = xtensa_cpu_do_interrupt; cc->dump_state = xtensa_cpu_dump_state; cc->set_pc = xtensa_cpu_set_pc; + cc->gdb_read_register = xtensa_cpu_gdb_read_register; + cc->gdb_write_register = xtensa_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY cc->get_phys_page_debug = xtensa_cpu_get_phys_page_debug; #endif diff --git a/target-xtensa/gdbstub.c b/target-xtensa/gdbstub.c index c963563f1f..9e13b20c46 100644 --- a/target-xtensa/gdbstub.c +++ b/target-xtensa/gdbstub.c @@ -17,9 +17,14 @@ * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, see . */ +#include "config.h" +#include "qemu-common.h" +#include "exec/gdbstub.h" -static int cpu_gdb_read_register(CPUXtensaState *env, uint8_t *mem_buf, int n) +int xtensa_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n) { + XtensaCPU *cpu = XTENSA_CPU(cs); + CPUXtensaState *env = &cpu->env; const XtensaGdbReg *reg = env->config->gdb_regmap.reg + n; if (n < 0 || n >= env->config->gdb_regmap.num_regs) { @@ -55,8 +60,10 @@ static int cpu_gdb_read_register(CPUXtensaState *env, uint8_t *mem_buf, int n) } } -static int cpu_gdb_write_register(CPUXtensaState *env, uint8_t *mem_buf, int n) +int xtensa_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) { + XtensaCPU *cpu = XTENSA_CPU(cs); + CPUXtensaState *env = &cpu->env; uint32_t tmp; const XtensaGdbReg *reg = env->config->gdb_regmap.reg + n; -- cgit v1.2.3-55-g7522