From e67db06e9f6d7e514ee2a9b9b769ecd42977f6fb Mon Sep 17 00:00:00 2001 From: Jia Liu Date: Fri, 20 Jul 2012 15:50:39 +0800 Subject: target-or32: Add target stubs and QOM cpu Add OpenRISC target stubs, QOM cpu and basic machine. Signed-off-by: Jia Liu Signed-off-by: Blue Swirl --- target-openrisc/mmu_helper.c | 43 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) create mode 100644 target-openrisc/mmu_helper.c (limited to 'target-openrisc/mmu_helper.c') diff --git a/target-openrisc/mmu_helper.c b/target-openrisc/mmu_helper.c new file mode 100644 index 0000000000..7c28079ddb --- /dev/null +++ b/target-openrisc/mmu_helper.c @@ -0,0 +1,43 @@ +/* + * OpenRISC MMU helper routines + * + * Copyright (c) 2011-2012 Jia Liu + * Zhizhou Zhang + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +#include "cpu.h" + +#ifndef CONFIG_USER_ONLY +#include "softmmu_exec.h" +#define MMUSUFFIX _mmu + +#define SHIFT 0 +#include "softmmu_template.h" + +#define SHIFT 1 +#include "softmmu_template.h" + +#define SHIFT 2 +#include "softmmu_template.h" + +#define SHIFT 3 +#include "softmmu_template.h" + +void tlb_fill(CPUOpenRISCState *env, target_ulong addr, int is_write, + int mmu_idx, uintptr_t retaddr) +{ +} +#endif -- cgit v1.2.3-55-g7522