From 90da0d5a703839c8db9f37355107955df043b654 Mon Sep 17 00:00:00 2001 From: Benjamin Herrenschmidt Date: Thu, 22 Oct 2015 18:30:59 +1100 Subject: ppc/spapr: Add "ibm,pa-features" property to the device-tree LoPAPR defines a "ibm,pa-features" per-CPU device tree property which describes extended features of the Processor Architecture. This adds the property to the device tree. At the moment this is the copy of what pHyp advertises except "I=1 (cache inhibited) Large Pages" which is enabled for TCG and disabled when running under HV KVM host with 4K system page size. Signed-off-by: Benjamin Herrenschmidt [aik: rebased, changed commit log, moved ci_large_pages initialization, renamed pa_features arrays] Signed-off-by: Alexey Kardashevskiy Signed-off-by: David Gibson --- target-ppc/cpu.h | 1 + 1 file changed, 1 insertion(+) (limited to 'target-ppc/cpu.h') diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 69d8cf6bd2..b34aed6a19 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1073,6 +1073,7 @@ struct CPUPPCState { uint64_t insns_flags2; #if defined(TARGET_PPC64) struct ppc_segment_page_sizes sps; + bool ci_large_pages; #endif #if defined(TARGET_PPC64) && !defined(CONFIG_USER_ONLY) -- cgit v1.2.3-55-g7522