From 57a4a11b2b281bb548b419ca81bfafb214e4c77a Mon Sep 17 00:00:00 2001 From: Aaron Lindsay Date: Mon, 21 Jan 2019 10:23:14 +0000 Subject: target/arm: Add array for supported PMU events, generate PMCEID[01]_EL0 This commit doesn't add any supported events, but provides the framework for adding them. We store the pm_event structs in a simple array, and provide the mapping from the event numbers to array indexes in the supported_event_map array. Because the value of PMCEID[01] depends upon which events are supported at runtime, generate it dynamically. Signed-off-by: Aaron Lindsay <alindsay@codeaurora.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20181211151945.29137-10-aaron@os.amperecomputing.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- target/arm/cpu.h | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'target/arm/cpu.h') diff --git a/target/arm/cpu.h b/target/arm/cpu.h index dc86a70b99..562291048d 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1008,6 +1008,16 @@ void pmu_op_finish(CPUARMState *env); void pmu_pre_el_change(ARMCPU *cpu, void *ignored); void pmu_post_el_change(ARMCPU *cpu, void *ignored); +/* + * get_pmceid + * @env: CPUARMState + * @which: which PMCEID register to return (0 or 1) + * + * Return the PMCEID[01]_EL0 register values corresponding to the counters + * which are supported given the current configuration + */ +uint64_t get_pmceid(CPUARMState *env, unsigned which); + /* SCTLR bit meanings. Several bits have been reused in newer * versions of the architecture; in that case we define constants * for both old and new bit meanings. Code which tests against those -- cgit v1.2.3-55-g7522