From 8bfc26ea302ec03585d7258a7cf8938f76512730 Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Thu, 7 Sep 2017 13:54:53 +0100 Subject: target/arm: Make CONTROL register banked for v8M Make the CONTROL register banked if v8M security extensions are enabled. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 1503414539-28762-10-git-send-email-peter.maydell@linaro.org --- target/arm/cpu.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'target/arm/cpu.h') diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 5cf2e76ffc..1d9eb369cc 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -422,7 +422,7 @@ typedef struct CPUARMState { uint32_t other_sp; uint32_t vecbase; uint32_t basepri[2]; - uint32_t control; + uint32_t control[2]; uint32_t ccr; /* Configuration and Control */ uint32_t cfsr; /* Configurable Fault Status */ uint32_t hfsr; /* HardFault Status */ @@ -1681,7 +1681,8 @@ static inline bool arm_v7m_is_handler_mode(CPUARMState *env) static inline int arm_current_el(CPUARMState *env) { if (arm_feature(env, ARM_FEATURE_M)) { - return arm_v7m_is_handler_mode(env) || !(env->v7m.control & 1); + return arm_v7m_is_handler_mode(env) || + !(env->v7m.control[env->v7m.secure] & 1); } if (is_a64(env)) { -- cgit v1.2.3-55-g7522