From aa1b3111b3f3c53b9290ecade02f31acfc579c16 Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Fri, 20 Jan 2017 11:15:09 +0000 Subject: target-arm: Expose output GPIO line for VCPU maintenance interrupt The GICv3 support for virtualization includes an outbound maintenance interrupt signal which is asserted when the CPU interface wants to signal to the hypervisor that it needs attention. Expose this as an outbound GPIO line from the CPU object which can be wired up as a physical interrupt line by the board code (as we do already for the CPU timers). Signed-off-by: Peter Maydell Reviewed-by: Edgar E. Iglesias Reviewed-by: Alistair Francis Message-id: 1483977924-14522-4-git-send-email-peter.maydell@linaro.org --- target/arm/cpu.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'target/arm/cpu.h') diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 7bd16eec18..fa09498939 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -558,6 +558,8 @@ struct ARMCPU { QEMUTimer *gt_timer[NUM_GTIMERS]; /* GPIO outputs for generic timer */ qemu_irq gt_timer_outputs[NUM_GTIMERS]; + /* GPIO output for GICv3 maintenance interrupt signal */ + qemu_irq gicv3_maintenance_interrupt; /* MemoryRegion to use for secure physical accesses */ MemoryRegion *secure_memory; -- cgit v1.2.3-55-g7522