From 3a98ac40fa9fca85bb37f4281e872b7519e733c5 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Tue, 25 May 2021 15:58:08 -0700 Subject: target/arm: Implement scalar float32 to bfloat16 conversion This is the 64-bit BFCVT and the 32-bit VCVT{B,T}.BF16.F32. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20210525225817.400336-4-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/translate-a64.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) (limited to 'target/arm/translate-a64.c') diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 95c2853f39..b335ca8735 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -6280,6 +6280,9 @@ static void handle_fp_1src_single(DisasContext *s, int opcode, int rd, int rn) case 0x3: /* FSQRT */ gen_helper_vfp_sqrts(tcg_res, tcg_op, cpu_env); goto done; + case 0x6: /* BFCVT */ + gen_fpst = gen_helper_bfcvt; + break; case 0x8: /* FRINTN */ case 0x9: /* FRINTP */ case 0xa: /* FRINTM */ @@ -6557,6 +6560,22 @@ static void disas_fp_1src(DisasContext *s, uint32_t insn) } break; + case 0x6: + switch (type) { + case 1: /* BFCVT */ + if (!dc_isar_feature(aa64_bf16, s)) { + goto do_unallocated; + } + if (!fp_access_check(s)) { + return; + } + handle_fp_1src_single(s, opcode, rd, rn); + break; + default: + goto do_unallocated; + } + break; + default: do_unallocated: unallocated_encoding(s); -- cgit v1.2.3-55-g7522