From 151c2f2841b01bf6fef079c9f1db15a86cae8276 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Wed, 4 Sep 2019 12:30:54 -0700 Subject: target/arm: Convert T16, shift immediate Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20190904193059.26202-65-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/translate.c | 26 ++------------------------ 1 file changed, 2 insertions(+), 24 deletions(-) (limited to 'target/arm/translate.c') diff --git a/target/arm/translate.c b/target/arm/translate.c index 48ed6f6b5d..d409afd55f 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -10754,7 +10754,7 @@ static void disas_thumb2_insn(DisasContext *s, uint32_t insn) static void disas_thumb_insn(DisasContext *s, uint32_t insn) { - uint32_t val, op, rm, rd, shift; + uint32_t val, rd; int32_t offset; TCGv_i32 tmp; TCGv_i32 tmp2; @@ -10766,29 +10766,7 @@ static void disas_thumb_insn(DisasContext *s, uint32_t insn) /* fall back to legacy decoder */ switch (insn >> 12) { - case 0: case 1: - - rd = insn & 7; - op = (insn >> 11) & 3; - if (op == 3) { - /* - * 0b0001_1xxx_xxxx_xxxx - * - Add, subtract (three low registers) - * - Add, subtract (two low registers and immediate) - * In decodetree. - */ - goto illegal_op; - } else { - /* shift immediate */ - rm = (insn >> 3) & 7; - shift = (insn >> 6) & 0x1f; - tmp = load_reg(s, rm); - gen_arm_shift_im(tmp, op, shift, s->condexec_mask == 0); - if (!s->condexec_mask) - gen_logic_CC(tmp); - store_reg(s, rd, tmp); - } - break; + case 0: case 1: /* add/sub (3reg, 2reg imm), shift imm; in decodetree */ case 2: case 3: /* add, sub, cmp, mov (reg, imm), in decodetree */ goto illegal_op; case 4: -- cgit v1.2.3-55-g7522