From ed84a60ca80c403749c1fc1bab27c85d8edba39d Mon Sep 17 00:00:00 2001 From: Rebecca Cran Date: Tue, 16 Feb 2021 15:45:43 -0700 Subject: target/arm: Set ID_PFR2.SSBS to 1 for "max" 32-bit CPU Enable FEAT_SSBS for the "max" 32-bit CPU. Signed-off-by: Rebecca Cran Reviewed-by: Richard Henderson Message-id: 20210216224543.16142-4-rebecca@nuviainc.com [PMM: fix typo causing compilation failure] Signed-off-by: Peter Maydell --- target/arm/cpu.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'target/arm') diff --git a/target/arm/cpu.c b/target/arm/cpu.c index b8bc89e71f..058672c977 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2217,6 +2217,10 @@ static void arm_max_initfn(Object *obj) t = cpu->isar.id_pfr0; t = FIELD_DP32(t, ID_PFR0, DIT, 1); cpu->isar.id_pfr0 = t; + + t = cpu->isar.id_pfr2; + t = FIELD_DP32(t, ID_PFR2, SSBS, 1); + cpu->isar.id_pfr2 = t; } #endif } -- cgit v1.2.3-55-g7522