From c5969d2eb17103d6c38c2d244d33ed2404210cd9 Mon Sep 17 00:00:00 2001 From: Nikunj A Dadhania Date: Tue, 10 Jan 2017 14:20:41 +0530 Subject: target-ppc: Add xvxsigsp instruction xvxsigsp: VSX Vector Extract Significand Single Precision Signed-off-by: Nikunj A Dadhania Signed-off-by: David Gibson --- target/ppc/fpu_helper.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) (limited to 'target/ppc/fpu_helper.c') diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c index 77f68e9dcd..4da83d9272 100644 --- a/target/ppc/fpu_helper.c +++ b/target/ppc/fpu_helper.c @@ -3026,3 +3026,23 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \ VSX_XXPERM(xxperm, 0) VSX_XXPERM(xxpermr, 1) + +void helper_xvxsigsp(CPUPPCState *env, uint32_t opcode) +{ + ppc_vsr_t xt, xb; + uint32_t exp, i, fraction; + + getVSR(xB(opcode), &xb, env); + memset(&xt, 0, sizeof(xt)); + + for (i = 0; i < 4; i++) { + exp = (xb.VsrW(i) >> 23) & 0xFF; + fraction = xb.VsrW(i) & 0x7FFFFF; + if (exp != 0 && exp != 255) { + xt.VsrW(i) = fraction | 0x00800000; + } else { + xt.VsrW(i) = fraction; + } + } + putVSR(xT(opcode), &xt, env); +} -- cgit v1.2.3-55-g7522