From bcb0b7b1a1c05707304f80ca6f523d557816f85c Mon Sep 17 00:00:00 2001 From: Giuseppe Musacchio Date: Mon, 9 Nov 2020 10:17:11 +0100 Subject: ppc/translate: Rewrite gen_lxvdsx to use gvec primitives Make the implementation match the lxvwsx one. The code is now shorter smaller and potentially faster as the translation will use the host SIMD capabilities if available. No functional change. Signed-off-by: Giuseppe Musacchio Message-Id: Reviewed-by: Richard Henderson Signed-off-by: David Gibson --- target/ppc/translate/vsx-impl.c.inc | 46 ++++++++++++++++++------------------- 1 file changed, 23 insertions(+), 23 deletions(-) (limited to 'target/ppc') diff --git a/target/ppc/translate/vsx-impl.c.inc b/target/ppc/translate/vsx-impl.c.inc index 075f063e98..b817d31260 100644 --- a/target/ppc/translate/vsx-impl.c.inc +++ b/target/ppc/translate/vsx-impl.c.inc @@ -75,29 +75,6 @@ static void gen_lxvd2x(DisasContext *ctx) tcg_temp_free_i64(t0); } -static void gen_lxvdsx(DisasContext *ctx) -{ - TCGv EA; - TCGv_i64 t0; - TCGv_i64 t1; - if (unlikely(!ctx->vsx_enabled)) { - gen_exception(ctx, POWERPC_EXCP_VSXU); - return; - } - t0 = tcg_temp_new_i64(); - t1 = tcg_temp_new_i64(); - gen_set_access_type(ctx, ACCESS_INT); - EA = tcg_temp_new(); - gen_addr_reg_index(ctx, EA); - gen_qemu_ld64_i64(ctx, t0, EA); - set_cpu_vsrh(xT(ctx->opcode), t0); - tcg_gen_mov_i64(t1, t0); - set_cpu_vsrl(xT(ctx->opcode), t1); - tcg_temp_free(EA); - tcg_temp_free_i64(t0); - tcg_temp_free_i64(t1); -} - static void gen_lxvw4x(DisasContext *ctx) { TCGv EA; @@ -169,6 +146,29 @@ static void gen_lxvwsx(DisasContext *ctx) tcg_temp_free_i32(data); } +static void gen_lxvdsx(DisasContext *ctx) +{ + TCGv EA; + TCGv_i64 data; + + if (unlikely(!ctx->vsx_enabled)) { + gen_exception(ctx, POWERPC_EXCP_VSXU); + return; + } + + gen_set_access_type(ctx, ACCESS_INT); + EA = tcg_temp_new(); + + gen_addr_reg_index(ctx, EA); + + data = tcg_temp_new_i64(); + tcg_gen_qemu_ld_i64(data, EA, ctx->mem_idx, MO_TEQ); + tcg_gen_gvec_dup_i64(MO_Q, vsr_full_offset(xT(ctx->opcode)), 16, 16, data); + + tcg_temp_free(EA); + tcg_temp_free_i64(data); +} + static void gen_bswap16x8(TCGv_i64 outh, TCGv_i64 outl, TCGv_i64 inh, TCGv_i64 inl) { -- cgit v1.2.3-55-g7522