From 43675d20150e65a5a45923a6fcd292e80006dad0 Mon Sep 17 00:00:00 2001 From: Sven Schnelle Date: Mon, 11 Mar 2019 20:15:52 +0100 Subject: target/hppa: fix overwriting source reg in addb When one of the source registers is the same as the destination register, the source register gets overwritten with the destionation value before do_add_sv() is called, which leads to unexpection condition matches. Signed-off-by: Sven Schnelle Message-Id: <20190311191602.25796-2-svens@stackframe.org> Reviewed-by: Richard Henderson Signed-off-by: Richard Henderson --- target/hppa/translate.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'target') diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 6c815e05c2..c4815d7e1a 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -3031,7 +3031,7 @@ static bool do_addb(DisasContext *ctx, unsigned r, TCGv_reg in1, DisasCond cond; in2 = load_gpr(ctx, r); - dest = dest_gpr(ctx, r); + dest = tcg_temp_new(); sv = NULL; cb_msb = NULL; @@ -3047,6 +3047,8 @@ static bool do_addb(DisasContext *ctx, unsigned r, TCGv_reg in1, } cond = do_cond(c * 2 + f, dest, cb_msb, sv); + save_gpr(ctx, r, dest); + tcg_temp_free(dest); return do_cbranch(ctx, disp, n, &cond); } -- cgit v1.2.3-55-g7522