<feed xmlns='http://www.w3.org/2005/Atom'>
<title>openslx-ng/ipxe.git/src/arch/arm, branch openslx</title>
<subtitle>Fork of ipxe; additional commands and features</subtitle>
<id>https://git.openslx.org/openslx-ng/ipxe.git/atom/src/arch/arm?h=openslx</id>
<link rel='self' href='https://git.openslx.org/openslx-ng/ipxe.git/atom/src/arch/arm?h=openslx'/>
<link rel='alternate' type='text/html' href='https://git.openslx.org/openslx-ng/ipxe.git/'/>
<updated>2024-09-13T13:38:23+00:00</updated>
<entry>
<title>[efi] Centralise definition of efi_cpu_nap()</title>
<updated>2024-09-13T13:38:23+00:00</updated>
<author>
<name>Michael Brown</name>
</author>
<published>2024-09-13T13:26:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/openslx-ng/ipxe.git/commit/?id=c85ad1246890cf3c0c5f2ac6de06ab046ddd0043'/>
<id>urn:sha1:c85ad1246890cf3c0c5f2ac6de06ab046ddd0043</id>
<content type='text'>
Define a cpu_halt() function which is architecture-specific but
platform-independent, and merge the multiple architecture-specific
implementations of the EFI cpu_nap() function into a single central
efi_cpu_nap() that uses cpu_halt() if applicable.

Signed-off-by: Michael Brown &lt;mcb30@ipxe.org&gt;
</content>
</entry>
<entry>
<title>[build] Centralise dummy architecture-specific headers</title>
<updated>2024-09-03T16:32:26+00:00</updated>
<author>
<name>Michael Brown</name>
</author>
<published>2024-09-03T13:56:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/openslx-ng/ipxe.git/commit/?id=804f35cb5a6ac7d35912822372b74fd8856f850b'/>
<id>urn:sha1:804f35cb5a6ac7d35912822372b74fd8856f850b</id>
<content type='text'>
Simplify the process of adding a new CPU architecture by providing
common implementations of typically empty architecture-specific header
files.

Signed-off-by: Michael Brown &lt;mcb30@ipxe.org&gt;
</content>
</entry>
<entry>
<title>[mp] Define an API for multiprocessor functions</title>
<updated>2024-03-15T13:26:53+00:00</updated>
<author>
<name>Michael Brown</name>
</author>
<published>2024-03-13T15:08:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/openslx-ng/ipxe.git/commit/?id=1ab4d3079d29e9ebee0c85f1aec14a3b1df8f679'/>
<id>urn:sha1:1ab4d3079d29e9ebee0c85f1aec14a3b1df8f679</id>
<content type='text'>
Define an API for executing very limited functions on application
processors in a multiprocessor system, along with an x86-only
implementation.

The normal iPXE runtime environment is effectively non-existent on
application processors.  There is no ability to make firmware calls
(e.g. to write to a console), and there may be no stack space
available.

Signed-off-by: Michael Brown &lt;mcb30@ipxe.org&gt;
</content>
</entry>
<entry>
<title>[efi] Fix hang during ExitBootServices()</title>
<updated>2024-01-31T13:23:56+00:00</updated>
<author>
<name>Ross Lagerwall</name>
</author>
<published>2024-01-30T10:52:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/openslx-ng/ipxe.git/commit/?id=65d69d33da445afc7ff56857af1881cf73666be4'/>
<id>urn:sha1:65d69d33da445afc7ff56857af1881cf73666be4</id>
<content type='text'>
When ExitBootServices() invokes efi_shutdown_hook(), there may be
nothing to generate an interrupt since the timer is disabled in the
first step of ExitBootServices().  Additionally, for VMs OVMF masks
everything from the PIC (except the timer) by default.  This means
that calling cpu_nap() may hang indefinitely.  This was seen in
practice in netfront_reset() when running in a VM on XenServer.

Fix this by skipping the halt if an EFI shutdown is in progress.

Signed-off-by: Ross Lagerwall &lt;ross.lagerwall@citrix.com&gt;
Modified-by: Michael Brown &lt;mcb30@ipxe.org&gt;
Signed-off-by: Michael Brown &lt;mcb30@ipxe.org&gt;
</content>
</entry>
<entry>
<title>[ioapi] Centralise definitions for dummy PIO</title>
<updated>2023-06-29T14:40:24+00:00</updated>
<author>
<name>Michael Brown</name>
</author>
<published>2023-06-29T14:08:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/openslx-ng/ipxe.git/commit/?id=c57887bfc808c2be485ed97f2dc709f927550161'/>
<id>urn:sha1:c57887bfc808c2be485ed97f2dc709f927550161</id>
<content type='text'>
There is no common standard for I/O-space access for non-x86 CPU
families, and non-MMIO peripherals are vanishingly rare.

Generalise the existing ARM definitions for dummy PIO to allow for
reuse by other CPU architectures.

Signed-off-by: Michael Brown &lt;mcb30@ipxe.org&gt;
</content>
</entry>
<entry>
<title>[arm] Add missing arch/arm/core source directory</title>
<updated>2023-06-29T14:40:24+00:00</updated>
<author>
<name>Michael Brown</name>
</author>
<published>2023-06-29T14:26:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/openslx-ng/ipxe.git/commit/?id=18af669701b5396af4073b9de4bdb6cd3aff68c1'/>
<id>urn:sha1:18af669701b5396af4073b9de4bdb6cd3aff68c1</id>
<content type='text'>
Signed-off-by: Michael Brown &lt;mcb30@ipxe.org&gt;
</content>
</entry>
<entry>
<title>[arm] Remove redundant inclusion of io.h</title>
<updated>2023-06-29T14:40:24+00:00</updated>
<author>
<name>Michael Brown</name>
</author>
<published>2023-06-29T14:38:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/openslx-ng/ipxe.git/commit/?id=cfe65aa82628f364718e8cb261e8f6b952cd9d26'/>
<id>urn:sha1:cfe65aa82628f364718e8cb261e8f6b952cd9d26</id>
<content type='text'>
The PCI I/O API (supporting accesses to PCI configuration space) is
not related to the general I/O API (supporting accesses to
memory-mapped I/O peripherals).

Remove the spurious inclusion of ipxe/io.h from the PCI I/O header.

Signed-off-by: Michael Brown &lt;mcb30@ipxe.org&gt;
</content>
</entry>
<entry>
<title>[rng] Allow entropy source to be selected at runtime</title>
<updated>2023-02-17T21:29:51+00:00</updated>
<author>
<name>Michael Brown</name>
</author>
<published>2023-02-17T16:56:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/openslx-ng/ipxe.git/commit/?id=9f17d1116d27696ec76c48c5c77df34cba521380'/>
<id>urn:sha1:9f17d1116d27696ec76c48c5c77df34cba521380</id>
<content type='text'>
As noted in commit 3c83843 ("[rng] Check for several functioning RTC
interrupts"), experimentation shows that Hyper-V cannot be trusted to
reliably generate RTC interrupts.  (As noted in commit f3ba0fb
("[hyperv] Provide timer based on the 10MHz time reference count
MSR"), Hyper-V appears to suffer from a general problem in reliably
generating any legacy interrupts.)  An alternative entropy source is
therefore required for an image that may be used in a Hyper-V Gen1
virtual machine.

The x86 RDRAND instruction provides a suitable alternative entropy
source, but may not be supported by all CPUs.  We must therefore allow
for multiple entropy sources to be compiled in, with the single active
entropy source selected only at runtime.

Restructure the internal entropy API to allow a working entropy source
to be detected and chosen at runtime.

Enable the RDRAND entropy source for all x86 builds, since it is
likely to be substantially faster than any other source.

Signed-off-by: Michael Brown &lt;mcb30@ipxe.org&gt;
</content>
</entry>
<entry>
<title>[ioapi] Move PAGE_SHIFT to bits/io.h</title>
<updated>2023-02-06T12:34:21+00:00</updated>
<author>
<name>Michael Brown</name>
</author>
<published>2023-02-06T12:32:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/openslx-ng/ipxe.git/commit/?id=ef0a6f47920a4fb245f35f1b2e4bcaa7305819cd'/>
<id>urn:sha1:ef0a6f47920a4fb245f35f1b2e4bcaa7305819cd</id>
<content type='text'>
The PAGE_SHIFT definition is an architectural property, rather than an
aspect of a particular I/O API implementation (of which, in theory,
there may be more than one per architecture).

Reflect this by moving the definition to the top-level bits/io.h for
each architecture.

Signed-off-by: Michael Brown &lt;mcb30@ipxe.org&gt;
</content>
</entry>
<entry>
<title>[arm] Support building as a Linux userspace binary for AArch64</title>
<updated>2023-01-22T20:36:57+00:00</updated>
<author>
<name>Michael Brown</name>
</author>
<published>2023-01-22T20:31:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/openslx-ng/ipxe.git/commit/?id=8f59911b201a89b99a2b0c8930b505cc3820b423'/>
<id>urn:sha1:8f59911b201a89b99a2b0c8930b505cc3820b423</id>
<content type='text'>
Add support for building as a Linux userspace binary for AArch64.
This allows the self-test suite to be more easily run for the 64-bit
ARM code.  For example:

  # On a native AArch64 system:
  #
  make bin-arm64-efi/tests.linux &amp;&amp; ./bin-arm64-efi/tests.linux

  # On a non-AArch64 system (e.g. x86_64) via cross-compilation,
  # assuming that kernel and glibc headers are present within
  # /usr/aarch64-linux-gnu/sys-root/:
  #
  make bin-arm64-linux/tests.linux CROSS=aarch64-linux-gnu- &amp;&amp; \
  qemu-aarch64 -L /usr/aarch64-linux-gnu/sys-root/ \
               ./bin-arm64-linux/tests.linux

Signed-off-by: Michael Brown &lt;mcb30@ipxe.org&gt;
</content>
</entry>
</feed>
