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<title>openslx-ng/ipxe.git/src/arch/riscv/Makefile, branch openslx</title>
<subtitle>Fork of ipxe; additional commands and features</subtitle>
<id>https://git.openslx.org/openslx-ng/ipxe.git/atom/src/arch/riscv/Makefile?h=openslx</id>
<link rel='self' href='https://git.openslx.org/openslx-ng/ipxe.git/atom/src/arch/riscv/Makefile?h=openslx'/>
<link rel='alternate' type='text/html' href='https://git.openslx.org/openslx-ng/ipxe.git/'/>
<updated>2024-10-28T19:20:50+00:00</updated>
<entry>
<title>[sbi] Add support for running as a RISC-V SBI payload</title>
<updated>2024-10-28T19:20:50+00:00</updated>
<author>
<name>Michael Brown</name>
</author>
<published>2024-10-28T14:40:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/openslx-ng/ipxe.git/commit/?id=e0e102ee24bdab68b0318b505402f60cfb88a5f0'/>
<id>urn:sha1:e0e102ee24bdab68b0318b505402f60cfb88a5f0</id>
<content type='text'>
Add basic support for running directly on top of SBI, with no UEFI
firmware present.  Build as e.g.:

  make CROSS=riscv64-linux-gnu- bin-riscv64/ipxe.sbi

The resulting binary can be tested in QEMU using e.g.:

  qemu-system-riscv64 -M virt -cpu max -serial stdio \
                      -kernel bin-riscv64/ipxe.sbi

No drivers or executable binary formats are supported yet, but the
unit test suite may be run successfully.

Signed-off-by: Michael Brown &lt;mcb30@ipxe.org&gt;
</content>
</entry>
<entry>
<title>[riscv] Add support for the SBI debug console</title>
<updated>2024-10-22T11:51:48+00:00</updated>
<author>
<name>Michael Brown</name>
</author>
<published>2024-10-22T11:51:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/openslx-ng/ipxe.git/commit/?id=b23204b383cdea4ad64276991b55d8019fee3265'/>
<id>urn:sha1:b23204b383cdea4ad64276991b55d8019fee3265</id>
<content type='text'>
Add the ability to issue Supervisor Binary Interface (SBI) calls via
the ECALL instruction, and use the SBI DBCN extension to implement a
debug console.

Signed-off-by: Michael Brown &lt;mcb30@ipxe.org&gt;
</content>
</entry>
<entry>
<title>[riscv] Add support for the RISC-V CPU architecture</title>
<updated>2024-09-15T21:34:10+00:00</updated>
<author>
<name>Michael Brown</name>
</author>
<published>2024-09-15T09:54:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/openslx-ng/ipxe.git/commit/?id=c215048ddaac75969c22c018871295a5748a47e8'/>
<id>urn:sha1:c215048ddaac75969c22c018871295a5748a47e8</id>
<content type='text'>
Add support for building iPXE as a 64-bit or 32-bit RISC-V binary, for
either UEFI or Linux userspace platforms.  For example:

  # RISC-V 64-bit UEFI
  make CROSS=riscv64-linux-gnu- bin-riscv64-efi/ipxe.efi

  # RISC-V 32-bit UEFI
  make CROSS=riscv64-linux-gnu- bin-riscv32-efi/ipxe.efi

  # RISC-V 64-bit Linux
  make CROSS=riscv64-linux-gnu- bin-riscv64-linux/tests.linux
  qemu-riscv64 -L /usr/riscv64-linux-gnu/sys-root \
               ./bin-riscv64-linux/tests.linux

  # RISC-V 32-bit Linux
  make CROSS=riscv64-linux-gnu- SYSROOT=/usr/riscv32-linux-gnu/sys-root \
       bin-riscv32-linux/tests.linux
  qemu-riscv32 -L /usr/riscv32-linux-gnu/sys-root \
               ./bin-riscv32-linux/tests.linux

Signed-off-by: Michael Brown &lt;mcb30@ipxe.org&gt;
</content>
</entry>
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