<feed xmlns='http://www.w3.org/2005/Atom'>
<title>openslx-ng/ipxe.git/src/arch/x86/include/ipxe, branch openslx</title>
<subtitle>Fork of ipxe; additional commands and features</subtitle>
<id>https://git.openslx.org/openslx-ng/ipxe.git/atom/src/arch/x86/include/ipxe?h=openslx</id>
<link rel='self' href='https://git.openslx.org/openslx-ng/ipxe.git/atom/src/arch/x86/include/ipxe?h=openslx'/>
<link rel='alternate' type='text/html' href='https://git.openslx.org/openslx-ng/ipxe.git/'/>
<updated>2026-01-14T13:25:34+00:00</updated>
<entry>
<title>[build] Mark core files as permitted for UEFI Secure Boot</title>
<updated>2026-01-14T13:25:34+00:00</updated>
<author>
<name>Michael Brown</name>
</author>
<published>2026-01-14T13:25:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/openslx-ng/ipxe.git/commit/?id=6cccb3bdc00359068c07125258d71ce24db5118a'/>
<id>urn:sha1:6cccb3bdc00359068c07125258d71ce24db5118a</id>
<content type='text'>
Mark all files used in a standard build of bin-x86_64-efi/snponly.efi
as permitted for UEFI Secure Boot.  These files represent the core
functionality of iPXE that is guaranteed to have been included in
every binary that was previously subject to a security review and
signed by Microsoft.  It is therefore legitimate to assume that at
least these files have already been reviewed to the required standard
multiple times.

Signed-off-by: Michael Brown &lt;mcb30@ipxe.org&gt;
</content>
</entry>
<entry>
<title>[pci] Allow probing permission to vary by range</title>
<updated>2025-11-24T23:16:32+00:00</updated>
<author>
<name>Michael Brown</name>
</author>
<published>2025-11-24T23:09:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/openslx-ng/ipxe.git/commit/?id=9c1ac48bcff1a623cc5422fb57c540d910ac9734'/>
<id>urn:sha1:9c1ac48bcff1a623cc5422fb57c540d910ac9734</id>
<content type='text'>
Make pci_can_probe() part of the runtime selectable PCI I/O API, and
defer this check to the per-range API.

Signed-off-by: Michael Brown &lt;mcb30@ipxe.org&gt;
</content>
</entry>
<entry>
<title>[pci] Use linker tables for runtime selectable PCI APIs</title>
<updated>2025-11-24T20:54:01+00:00</updated>
<author>
<name>Michael Brown</name>
</author>
<published>2025-11-24T20:18:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/openslx-ng/ipxe.git/commit/?id=ff1a17dc7e5d764b905559fdc623249741d173dd'/>
<id>urn:sha1:ff1a17dc7e5d764b905559fdc623249741d173dd</id>
<content type='text'>
Use the linker table mechanism to enumerate the underlying PCI I/O
APIs, to allow PCIAPI_CLOUD to become architecture-independent code.

Signed-off-by: Michael Brown &lt;mcb30@ipxe.org&gt;
</content>
</entry>
<entry>
<title>[bios] Use generic external heap based on the system memory map</title>
<updated>2025-05-19T19:47:21+00:00</updated>
<author>
<name>Michael Brown</name>
</author>
<published>2025-05-19T17:55:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/openslx-ng/ipxe.git/commit/?id=d0c35b6823db973eb20f0bfdc3e4944f16952ad7'/>
<id>urn:sha1:d0c35b6823db973eb20f0bfdc3e4944f16952ad7</id>
<content type='text'>
Signed-off-by: Michael Brown &lt;mcb30@ipxe.org&gt;
</content>
</entry>
<entry>
<title>[bios] Describe umalloc() heap as an in-use memory area</title>
<updated>2025-05-16T15:18:36+00:00</updated>
<author>
<name>Michael Brown</name>
</author>
<published>2025-05-15T14:35:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/openslx-ng/ipxe.git/commit/?id=3812860e39faafa56d4b833030b1a8427488bd16'/>
<id>urn:sha1:3812860e39faafa56d4b833030b1a8427488bd16</id>
<content type='text'>
Use the concept of an in-use memory region defined as part of the
system memory map API to describe the umalloc() heap.

Signed-off-by: Michael Brown &lt;mcb30@ipxe.org&gt;
</content>
</entry>
<entry>
<title>[bios] Update to use the generic system memory map API</title>
<updated>2025-05-16T15:18:36+00:00</updated>
<author>
<name>Michael Brown</name>
</author>
<published>2025-05-15T00:21:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/openslx-ng/ipxe.git/commit/?id=4c4c94ca09473ecbfce7e47edd0012949f4d25a3'/>
<id>urn:sha1:4c4c94ca09473ecbfce7e47edd0012949f4d25a3</id>
<content type='text'>
Provide an implementation of the system memory map API based on the
assorted BIOS INT 15 calls, and a temporary implementation of the
legacy get_memmap() function using the new API.

Signed-off-by: Michael Brown &lt;mcb30@ipxe.org&gt;
</content>
</entry>
<entry>
<title>[acpi] Remove userptr_t from ACPI table parsing</title>
<updated>2025-04-22T13:21:06+00:00</updated>
<author>
<name>Michael Brown</name>
</author>
<published>2025-04-22T13:13:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/openslx-ng/ipxe.git/commit/?id=0b3fc48fefd311b17b666fecf3a34688717727e8'/>
<id>urn:sha1:0b3fc48fefd311b17b666fecf3a34688717727e8</id>
<content type='text'>
Simplify the ACPI table parsing code by assuming that all table
content is fully accessible via pointer dereferences.

Signed-off-by: Michael Brown &lt;mcb30@ipxe.org&gt;
</content>
</entry>
<entry>
<title>[efi] Centralise definition of efi_cpu_nap()</title>
<updated>2024-09-13T13:38:23+00:00</updated>
<author>
<name>Michael Brown</name>
</author>
<published>2024-09-13T13:26:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/openslx-ng/ipxe.git/commit/?id=c85ad1246890cf3c0c5f2ac6de06ab046ddd0043'/>
<id>urn:sha1:c85ad1246890cf3c0c5f2ac6de06ab046ddd0043</id>
<content type='text'>
Define a cpu_halt() function which is architecture-specific but
platform-independent, and merge the multiple architecture-specific
implementations of the EFI cpu_nap() function into a single central
efi_cpu_nap() that uses cpu_halt() if applicable.

Signed-off-by: Michael Brown &lt;mcb30@ipxe.org&gt;
</content>
</entry>
<entry>
<title>[pci] Separate permission to probe buses from bus:dev.fn range discovery</title>
<updated>2024-08-15T08:31:14+00:00</updated>
<author>
<name>Michael Brown</name>
</author>
<published>2024-08-15T07:46:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/openslx-ng/ipxe.git/commit/?id=7c82ff0b6b12437bfc25d01d52308fc6fe2e1311'/>
<id>urn:sha1:7c82ff0b6b12437bfc25d01d52308fc6fe2e1311</id>
<content type='text'>
The UEFI device model requires us to not probe the PCI bus directly,
but instead to wait to be offered the opportunity to drive devices via
our driver service binding handle.

We currently inhibit PCI bus probing by having pci_discover() return
an empty range when using the EFI PCI I/O API.  This has the unwanted
side effect that scanning the bus manually using the "pciscan" command
will also fail to discover any devices.

Separate out the concept of being allowed to probe PCI buses from the
mechanism for discovering PCI bus:dev.fn address ranges, so that this
limitation may be removed.

Signed-off-by: Michael Brown &lt;mcb30@ipxe.org&gt;
</content>
</entry>
<entry>
<title>[cpuid] Allow reading hypervisor CPUID leaves</title>
<updated>2024-08-01T11:49:48+00:00</updated>
<author>
<name>Michael Brown</name>
</author>
<published>2024-07-31T15:35:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/openslx-ng/ipxe.git/commit/?id=121d96b903b221e2c63fa0fc5a8901dc24645a47'/>
<id>urn:sha1:121d96b903b221e2c63fa0fc5a8901dc24645a47</id>
<content type='text'>
Hypervisors typically intercept CPUID leaves in the range 0x40000000
to 0x400000ff, with leaf 0x40000000 returning the maximum supported
function within this range in register %eax.

iPXE currently masks off bit 30 from the requested CPUID leaf when
checking to see if a function is supported, which causes this check to
read from leaf 0x00000000 instead of 0x40000000.

Fix by including bit 30 within the mask.

Signed-off-by: Michael Brown &lt;mcb30@ipxe.org&gt;
</content>
</entry>
</feed>
