openslx-ng/ipxe.git/src/arch/x86, branch openslx

Merge branch 'master' into openslx

2026-01-28T11:53:53+00:00

[prefix] Make unlzma.S compatible with 386 class CPUs

2026-01-25T16:15:32+00:00

Replace the bswap instruction with xchgb and roll and change the module architecture from i486 to i386 to be consistent with the rest of the project. Modified-by: Michael Brown Signed-off-by: Michael Brown

[build] Mark known reviewed files as permitted for UEFI Secure Boot

2026-01-14T16:10:29+00:00

Some past security reviews carried out for UEFI Secure Boot signing submissions have covered specific drivers or functional areas of iPXE. Mark all of the files comprising these areas as permitted for UEFI Secure Boot. Signed-off-by: Michael Brown

[build] Mark core files as permitted for UEFI Secure Boot

2026-01-14T13:25:34+00:00

Mark all files used in a standard build of bin-x86_64-efi/snponly.efi as permitted for UEFI Secure Boot. These files represent the core functionality of iPXE that is guaranteed to have been included in every binary that was previously subject to a security review and signed by Microsoft. It is therefore legitimate to assume that at least these files have already been reviewed to the required standard multiple times. Signed-off-by: Michael Brown

[crypto] Allow for zero-length big integer literals

2025-12-29T14:01:46+00:00

Ensure that zero-length big integer literals are treated as containing a zero value. Avoid tests on every big integer arithmetic operation by ensuring that bigint_required_size() always returns a non-zero value: the zero-length tests can therefore be restricted to only bigint_init() and bigint_done(). Signed-off-by: Michael Brown

[pci] Allow probing permission to vary by range

2025-11-24T23:16:32+00:00

Make pci_can_probe() part of the runtime selectable PCI I/O API, and defer this check to the per-range API. Signed-off-by: Michael Brown

[pci] Use linker tables for runtime selectable PCI APIs

2025-11-24T20:54:01+00:00

Use the linker table mechanism to enumerate the underlying PCI I/O APIs, to allow PCIAPI_CLOUD to become architecture-independent code. Signed-off-by: Michael Brown

[pci] Allow PCI configuration space access mechanism to vary by range

2025-11-24T19:10:49+00:00

On some systems (observed on an AWS EC2 c7a.medium instance in eu-west-2), there is no single PCI configuration space access mechanism that covers all PCI devices. For example: the ECAM may provide access only to bus 01 and above, with type 1 accesses required to access bus 00. Allow the choice of PCI configuration space access mechanism to be made on a per-range basis, rather than being made just once in an initialisation function. Signed-off-by: Michael Brown

[ioapi] Allow iounmap() to be called for port I/O addresses

2025-11-05T19:33:53+00:00

Allow code using the combined MMIO and port I/O accessors to safely call iounmap() to unmap the MMIO or port I/O region. In the virtual offset I/O mapping API as used for UEFI, 32-bit BIOS, and 32-bit RISC-V SBI, iounmap() is a no-op anyway. In 64-bit RISC-V SBI, we have no concept of port I/O and so the issue is moot. This leaves only 64-bit BIOS, where it suffices to simply do nothing for any pages outside of the chosen MMIO virtual address range. For symmetry, we implement the equivalent change in the very closely related RISC-V page management code. Signed-off-by: Michael Brown

[uart] Support 16550 UARTs accessed via either MMIO or port I/O

2025-11-04T21:14:41+00:00

Use the combined accessors ioread8() and iowrite8() to read and write 16550 UART registers, to allow the decision between using MMIO and port I/O to be made at runtime. Minimise the increase in code size for x86 by ignoring the register shift, since this is essentially used only for non-x86 SoCs. Signed-off-by: Michael Brown