Fork of ipxe; additional commands and features https://git.openslx.org/openslx-ng/ipxe.git/atom/src/drivers/net/etherfabric.c?h=v0.9.6 2008-11-19T19:33:05+00:00 2008-11-19T19:33:05+00:00 Michael Brown 2008-11-19T19:33:05+00:00 urn:sha1:0ebbbb95fa03622423154a3e56251dd58832654d Remove various 32-bit assumptions scattered throughout the codebase. The code is still not necessarily 64-bit clean, but will at least compile. 2008-10-17T00:51:41+00:00 Michael Brown 2008-10-16T16:21:48+00:00 urn:sha1:58dd6e04c51b16ac0295f517aef8f452c1526d50 Also clean up minor errors in the use of debug macros. 2008-10-01T18:24:56+00:00 Michael Brown 2008-10-01T18:15:07+00:00 urn:sha1:9dccbc0af2337e3e81716b338c0f55449c0be360 Some devices (e.g. the Atmel AT24C11) have no concept of a device address; they respond to every device address and use this value as the word address. Some other devices use part of the device address field to extend the word address field. Generalise the i2c bit-bashing support to handle this by defining the device address length and word address length as properties of an i2c device. The word address is assumed to overflow into the device address field if the address used exceeds the width of the word address field. Also add a bus reset mechanism. i2c chips don't usually have a reset line, so rebooting the host will not clear any bizarre state that the chip may be in. We reset the bus by clocking SCL until we see SDA high, at which point we know we can generate a start condition and have it seen by all devices. We then generate a stop condition to leave the bus in a known state prior to use. Finally, add some extra debugging messages to i2c_bit.c. 2008-03-21T22:15:31+00:00 Michael Brown 2008-03-21T22:15:31+00:00 urn:sha1:8afb36c3bc08ff0c9bdf0a8496cb08a8bfe287f3 2008-03-02T00:41:10+00:00 Alexey Zaytsev 2008-03-02T00:41:10+00:00 urn:sha1:a1572e0ab0f5fab9a1f0185ded593bec811aa175 Signed-off-by: Alexey Zaytsev <alexey.zaytsev@gmail.com> 2006-12-21T17:16:06+00:00 Michael Brown 2006-12-21T17:16:06+00:00 urn:sha1:7ce3df65c21900af3dbc182d561be032f687d7a8 2006-12-18T15:28:34+00:00 Michael Brown 2006-12-18T15:28:34+00:00 urn:sha1:a497e16767dc81f0c5aef2c9102f4ca5bbbf93f9 2006-12-05T17:56:13+00:00 Michael Brown 2006-12-05T17:56:13+00:00 urn:sha1:a128b33b8b99b0afca2b6c71b96e5a29c4c0f586 anywhere other than offset 0 within the EEPROM, so we have to put our settings at 0x100 instead. 2006-12-05T16:00:06+00:00 Michael Brown 2006-12-05T16:00:06+00:00 urn:sha1:4c3e0fede51defc40ddac4555f47fe029ee46829 2006-12-05T10:01:00+00:00 Michael Brown 2006-12-05T10:01:00+00:00 urn:sha1:cb883b3fafa306cf3a695a8c579d4701fd5852b1