openslx-ng/ipxe.git/src/drivers/net/phantom, branch v0.9.5Fork of ipxe; additional commands and featureshttps://git.openslx.org/openslx-ng/ipxe.git/atom/src/drivers/net/phantom?h=v0.9.52008-09-23T22:36:55+00:00[phantom] Skip command PEG initialisation if PEG is already running2008-09-23T22:36:55+00:00Michael Brown2008-09-23T22:36:55+00:00urn:sha1:4011f9d956e224ed245d54dcfcf5d152a5ca297d
It is possible for the BIOS to use the UNDI API to bring up the NIC
prior to system boot. If this happens, UNM_NIC_REG_CMDPEG_STATE will
contain the value 0xf00f (UNM_NIC_REG_CMDPEG_STATE_INITIALIZE_ACK),
and we should skip initialising the command PEG.
[phantom] Omit an initialisation step now performed by the firmware2008-09-23T22:11:05+00:00Michael Brown2008-09-23T22:11:05+00:00urn:sha1:e13d7931600ca98516985298a41cae9b242877e7
The firmware will now determine the right port mode on all cards, so
the PXE driver doesn't have to set it. (Setting the port mode
apparently breaks some newer cards.)
[phantom] Fix P3 B1 silicon bug workaround2008-08-27T20:25:06+00:00Michael Brown2008-08-27T20:25:06+00:00urn:sha1:cb6fea069075794f187e269af62ef66339169bbe
Commit f58cc3f introduced a temporary workaround for a bug in current
prototype silicon, but failed to apply it to all eight PCI functions
within the device.
[phantom] Remove comment that no longer matches reality2008-08-26T03:45:31+00:00Michael Brown2008-08-26T03:45:31+00:00urn:sha1:07581d3faacf96bb4c2ade4fe360926e344b29b1[phantom] Temporary workaround for bug in prototype (P3 B1) silicon2008-08-25T22:25:33+00:00Michael Brown2008-08-25T22:25:33+00:00urn:sha1:f58cc3fca8967b68d108e787239557a81ca852a2[phantom] Add new board type2008-07-24T18:40:10+00:00Michael Brown2008-07-24T18:40:10+00:00urn:sha1:f493283c74e4ded0c4234ddfde097fbfea0b7266[phantom] Guard against partially-written status descriptors2008-07-17T14:45:40+00:00Michael Brown2008-07-17T14:45:40+00:00urn:sha1:4e033c774b3731488cc7750f2d4d89c12661a254
Conjecture: The hardware issues 64-bit DMA writes of status descriptors,
which some PCI bridges seem to split into two 32-bit writes in reverse
order (i.e. dword 1 first). This means that we sometimes observe a
partial status descriptor. Add an explicit check to ensure that the
descriptor is complete before processing it.
Also ensure that the RDS consumer counter is incremented only when we
know that we have actually consumed an RX descriptor.
[phantom] Remove warning relating to now-fixed firmware bug2008-07-08T21:37:36+00:00Michael Brown2008-07-08T21:37:36+00:00urn:sha1:d474386336609281cb98c2bb38de601d9bb6b081[phantom] Add NetXen dual copyright2008-07-08T21:36:07+00:00Michael Brown2008-07-08T21:36:07+00:00urn:sha1:22d00797f15c0d4d43918c0692f6f31b7163be16[phantom] Initialise RCVPEG before reading MAC addresses2008-07-08T19:59:33+00:00Michael Brown2008-07-08T19:59:33+00:00urn:sha1:4f05d2fca7c46d1132fe6d0ddd3edb1137ba1137