diff options
| author | H. Peter Anvin | 2008-02-09 01:19:02 +0100 |
|---|---|---|
| committer | H. Peter Anvin | 2008-02-11 03:06:10 +0100 |
| commit | 621c2886aa0eb41e49923996c1853b861f7e7e96 (patch) | |
| tree | 0e740d664fa1094510468710f86446510be69023 | |
| parent | Fixes for EqualLogic iSCSI targets: (diff) | |
| download | ipxe-621c2886aa0eb41e49923996c1853b861f7e7e96.tar.gz ipxe-621c2886aa0eb41e49923996c1853b861f7e7e96.tar.xz ipxe-621c2886aa0eb41e49923996c1853b861f7e7e96.zip | |
UNDI ISR: save and restore 32-bit registers
As written, if the if the UNDI ISR call clobbers the upper halves of
any of the GPRs (which by convention it is permitted to do, and by
paranoia should be expected to do) then nothing in the interrupt
handler will recover the state.
Additionally, save/restore %fs and %gs out of sheer paranoia - it's a
cheap enough operation, and may prevent problems due to poorly written
UNDI stacks.
| -rw-r--r-- | src/arch/i386/drivers/net/undiisr.S | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/src/arch/i386/drivers/net/undiisr.S b/src/arch/i386/drivers/net/undiisr.S index 24630148..15e1a63a 100644 --- a/src/arch/i386/drivers/net/undiisr.S +++ b/src/arch/i386/drivers/net/undiisr.S @@ -21,7 +21,9 @@ undiisr: /* Preserve registers */ pushw %ds pushw %es - pusha + pushw %fs + pushw %gs + pushal /* Set up our segment registers */ movw %cs:rm_ds, %ax @@ -32,8 +34,7 @@ undiisr: je chain /* Issue UNDI API call */ - pushw %ds - popw %es + movw %ax, %es movw $undinet_params, %di movw $PXENV_UNDI_ISR, %bx movw $PXENV_UNDI_ISR_IN_START, funcflag @@ -62,7 +63,9 @@ chain: /* Chain to next handler */ lcall *undiisr_next_handler exit: /* Restore registers and return */ - popa + popal + popw %gs + popw %fs popw %es popw %ds iret |