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| author | Joshua Oreman | 2009-08-10 07:12:21 +0200 |
|---|---|---|
| committer | Michael Brown | 2009-08-11 13:59:26 +0200 |
| commit | d5d68b2e310b8bf0caa6b8529f1ce7adbb92e771 (patch) | |
| tree | 520a11c84f5542fbc26fb8ad0b0464432f951305 /src/arch/i386/prefix/romprefix.S | |
| parent | [doc] Update doxygen.cfg to match version running on rom.etherboot.org (diff) | |
| download | ipxe-d5d68b2e310b8bf0caa6b8529f1ce7adbb92e771.tar.gz ipxe-d5d68b2e310b8bf0caa6b8529f1ce7adbb92e771.tar.xz ipxe-d5d68b2e310b8bf0caa6b8529f1ce7adbb92e771.zip | |
[zbin] Change fixup semantics to support ROMs over 128k uncompressed
The option ROM header contains a one-byte field indicating the number
of 512-byte sectors in the ROM image. Currently it is linked to
contain the number of uncompressed sectors, with an instruction to the
compressor to correct it. This causes link failure when the
uncompressed size of the ROM image is over 128k.
Fix by replacing the SUBx compressor fixup with an ADDx fixup that
adds the total compressed output length, scaled as requested, to an
addend stored in the field where the final length value will be
placed. This is similar to the behavior of ELF relocations, and
ensures that an overflow error will not be generated unless the
compressed size is still too large for the field.
This also allows us to do away with the _filesz_pgh and _filesz_sect
calculations exported by the linker script.
Output tested bitwise identical to the old SUBx mechanism on hd, dsk,
lkrn, and rom prefixes, on both 32-bit and 64-bit processors.
Modified-by: Michael Brown <mcb30@etherboot.org>
Signed-off-by: Michael Brown <mcb30@etherboot.org>
Diffstat (limited to 'src/arch/i386/prefix/romprefix.S')
| -rw-r--r-- | src/arch/i386/prefix/romprefix.S | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/arch/i386/prefix/romprefix.S b/src/arch/i386/prefix/romprefix.S index 4b9d5447..cb474e81 100644 --- a/src/arch/i386/prefix/romprefix.S +++ b/src/arch/i386/prefix/romprefix.S @@ -33,7 +33,7 @@ FILE_LICENCE ( GPL2_OR_LATER ) .org 0x00 romheader: .word 0xAA55 /* BIOS extension signature */ -romheader_size: .byte _filesz_sect /* Size in 512-byte blocks */ +romheader_size: .byte 0 /* Size in 512-byte blocks */ jmp init /* Initialisation vector */ checksum: .byte 0 @@ -46,7 +46,7 @@ checksum: .size romheader, . - romheader .section ".zinfo.fixup", "a", @progbits /* Compressor fixups */ - .ascii "SUBB" + .ascii "ADDB" .long romheader_size .long 512 .long 0 @@ -61,23 +61,23 @@ pciheader: .byte 0x03 /* PCI data structure revision */ .byte 0x02, 0x00, 0x00 /* Class code */ pciheader_image_length: - .word _filesz_sect /* Image length */ + .word 0 /* Image length */ .word 0x0001 /* Revision level */ .byte 0x00 /* Code type */ .byte 0x80 /* Last image indicator */ pciheader_runtime_length: - .word _filesz_sect /* Maximum run-time image length */ + .word 0 /* Maximum run-time image length */ .word 0x0000 /* Configuration utility code header */ .word 0x0000 /* DMTF CLP entry point */ .equ pciheader_len, . - pciheader .size pciheader, . - pciheader .section ".zinfo.fixup", "a", @progbits /* Compressor fixups */ - .ascii "SUBW" + .ascii "ADDW" .long pciheader_image_length .long 512 .long 0 - .ascii "SUBW" + .ascii "ADDW" .long pciheader_runtime_length .long 512 .long 0 |