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author | Michael Brown | 2021-02-18 15:30:27 +0100 |
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committer | Michael Brown | 2021-02-18 16:38:56 +0100 |
commit | 900f1f98d3dbb64803e427318ad61c9d7aa6f9bb (patch) | |
tree | 93397baefd0b1391e321dcdfe04afabd1578e89b /src/arch/x86/transitions/librm_mgmt.c | |
parent | [librm] Add missing __asmcall on init_idt() (diff) | |
download | ipxe-900f1f98d3dbb64803e427318ad61c9d7aa6f9bb.tar.gz ipxe-900f1f98d3dbb64803e427318ad61c9d7aa6f9bb.tar.xz ipxe-900f1f98d3dbb64803e427318ad61c9d7aa6f9bb.zip |
[librm] Test for FXSAVE/FXRSTOR instruction support
Assume that preservation of the %xmm registers is unnecessary during
installation of iPXE into memory, since this is an operation that by
its nature substantially disrupts large portions of the system anyway
(such as the E820 memory map). This assumption allows us to utilise
the existing CPUID code to check that FXSAVE/FXRSTOR are supported.
Test for support during the call to init_librm and store the flag for
use during subsequent calls to virt_call.
Reduce the scope of TIVOLI_VMM_WORKAROUND to affecting only the call
to check_fxsr(), to reduce #ifdef pollution in the remaining code.
Debugged-by: Johannes Heimansberg <git@jhe.dedyn.io>
Signed-off-by: Michael Brown <mcb30@ipxe.org>
Diffstat (limited to 'src/arch/x86/transitions/librm_mgmt.c')
-rw-r--r-- | src/arch/x86/transitions/librm_mgmt.c | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/src/arch/x86/transitions/librm_mgmt.c b/src/arch/x86/transitions/librm_mgmt.c index 85cfc8f4..da221e8b 100644 --- a/src/arch/x86/transitions/librm_mgmt.c +++ b/src/arch/x86/transitions/librm_mgmt.c @@ -14,6 +14,7 @@ FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL ); #include <realmode.h> #include <pic8259.h> #include <ipxe/shell.h> +#include <ipxe/cpuid.h> /* * This file provides functions for managing librm. @@ -386,6 +387,21 @@ static void iounmap_pages ( volatile const void *io_addr ) { io_addr, first, i ); } +/** + * Check for FXSAVE/FXRSTOR instruction support + * + */ +__asmcall void check_fxsr ( struct i386_all_regs *regs ) { + struct x86_features features; + + /* Check for FXSR bit */ + x86_features ( &features ); + if ( ! ( features.intel.edx & CPUID_FEATURES_INTEL_EDX_FXSR ) ) + regs->flags |= CF; + DBGC ( &features, "FXSAVE/FXRSTOR is%s supported\n", + ( ( regs->flags & CF ) ? " not" : "" ) ); +} + PROVIDE_UACCESS_INLINE ( librm, phys_to_user ); PROVIDE_UACCESS_INLINE ( librm, user_to_phys ); PROVIDE_UACCESS_INLINE ( librm, virt_to_user ); |