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authorMichael Brown2006-05-16 17:12:06 +0200
committerMichael Brown2006-05-16 17:12:06 +0200
commit15ee09ed10d71969abeea9f578f061e096ef43d0 (patch)
treefe9465a87de8f62287474b1c2dc85516b868fbf5 /src/drivers/net/natsemi.c
parentMissed a reference to heap.h. (diff)
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Restructured PCI subsystem to fit the new device model.
Generic PCI code now handles 64-bit BARs correctly when setting "membase"; drivers should need to call pci_bar_start() only if they want to use BARs other than the first memory or I/O BAR. Split rarely-used PCI functions out into pciextra.c. Core PCI code is now 662 bytes (down from 1308 bytes in Etherboot 5.4). 284 bytes of this saving comes from the pci/pciextra split. Cosmetic changes to lots of drivers (e.g. vendor_id->vendor in order to match the names used in Linux).
Diffstat (limited to 'src/drivers/net/natsemi.c')
-rw-r--r--src/drivers/net/natsemi.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/drivers/net/natsemi.c b/src/drivers/net/natsemi.c
index 951195f1..c34d611f 100644
--- a/src/drivers/net/natsemi.c
+++ b/src/drivers/net/natsemi.c
@@ -259,8 +259,8 @@ natsemi_probe ( struct nic *nic, struct pci_device *pci ) {
nic->ioaddr = pci->ioaddr;
ioaddr = pci->ioaddr;
- vendor = pci->vendor_id;
- dev_id = pci->device_id;
+ vendor = pci->vendor;
+ dev_id = pci->device;
nic_name = pci->name;
/* natsemi has a non-standard PM control register
@@ -770,7 +770,7 @@ static struct nic_operations natsemi_operations = {
};
-static struct pci_id natsemi_nics[] = {
+static struct pci_device_id natsemi_nics[] = {
PCI_ROM(0x100b, 0x0020, "dp83815", "DP83815"),
};