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* [efi] Centralise definition of efi_cpu_nap()Michael Brown2024-09-132-20/+8Star
| | | | | | | | | Define a cpu_halt() function which is architecture-specific but platform-independent, and merge the multiple architecture-specific implementations of the EFI cpu_nap() function into a single central efi_cpu_nap() that uses cpu_halt() if applicable. Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [build] Centralise dummy architecture-specific headersMichael Brown2024-09-0312-144/+0Star
| | | | | | | | Simplify the process of adding a new CPU architecture by providing common implementations of typically empty architecture-specific header files. Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [mp] Define an API for multiprocessor functionsMichael Brown2024-03-151-0/+12
| | | | | | | | | | | | | Define an API for executing very limited functions on application processors in a multiprocessor system, along with an x86-only implementation. The normal iPXE runtime environment is effectively non-existent on application processors. There is no ability to make firmware calls (e.g. to write to a console), and there may be no stack space available. Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [ioapi] Centralise definitions for dummy PIOMichael Brown2023-06-291-49/+5Star
| | | | | | | | | | There is no common standard for I/O-space access for non-x86 CPU families, and non-MMIO peripherals are vanishingly rare. Generalise the existing ARM definitions for dummy PIO to allow for reuse by other CPU architectures. Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [arm] Remove redundant inclusion of io.hMichael Brown2023-06-291-2/+0Star
| | | | | | | | | | The PCI I/O API (supporting accesses to PCI configuration space) is not related to the general I/O API (supporting accesses to memory-mapped I/O peripherals). Remove the spurious inclusion of ipxe/io.h from the PCI I/O header. Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [rng] Allow entropy source to be selected at runtimeMichael Brown2023-02-171-12/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | As noted in commit 3c83843 ("[rng] Check for several functioning RTC interrupts"), experimentation shows that Hyper-V cannot be trusted to reliably generate RTC interrupts. (As noted in commit f3ba0fb ("[hyperv] Provide timer based on the 10MHz time reference count MSR"), Hyper-V appears to suffer from a general problem in reliably generating any legacy interrupts.) An alternative entropy source is therefore required for an image that may be used in a Hyper-V Gen1 virtual machine. The x86 RDRAND instruction provides a suitable alternative entropy source, but may not be supported by all CPUs. We must therefore allow for multiple entropy sources to be compiled in, with the single active entropy source selected only at runtime. Restructure the internal entropy API to allow a working entropy source to be detected and chosen at runtime. Enable the RDRAND entropy source for all x86 builds, since it is likely to be substantially faster than any other source. Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [ioapi] Move PAGE_SHIFT to bits/io.hMichael Brown2023-02-062-3/+3
| | | | | | | | | | | The PAGE_SHIFT definition is an architectural property, rather than an aspect of a particular I/O API implementation (of which, in theory, there may be more than one per architecture). Reflect this by moving the definition to the top-level bits/io.h for each architecture. Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [arm] Provide dummy implementations for {in,out}[s]{b,w,l}Michael Brown2019-07-141-18/+59
| | | | | | | | | | | | | | | | | It is currently not possible to build the all-drivers iPXE binaries for ARM, since there is no implementation for inb(), outb(), etc. There is no common standard for accessing I/O space on ARM platforms, and there are almost no ARM-compatible peripherals that actually require I/O space accesses. Provide dummy implementations that behave as though no device is present (i.e. ignore writes, return all bits high for reads). This is sufficient to allow the all-drivers binaries to link, and should cause drivers to behave as though no I/O space peripherals are present in the system. Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [acpi] Make acpi_find_rsdt() a per-platform methodMichael Brown2017-05-231-0/+12
| | | | Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [time] Allow timer to be selected at runtimeMichael Brown2017-01-261-12/+0Star
| | | | | | | | | | | | | | | | | | | | | | Allow the active timer (providing udelay() and currticks()) to be selected at runtime based on probing during the INIT_EARLY stage of initialisation. TICKS_PER_SEC is now a fixed compile-time constant for all builds, and is independent of the underlying clock tick rate. We choose the value 1024 to allow multiplications and divisions on seconds to be converted to bit shifts. TICKS_PER_MS is defined as 1, allowing multiplications and divisions on milliseconds to be omitted entirely. The 2% inaccuracy in this definition is negligible when using the standard BIOS timer (running at around 18.2Hz). TIMER_RDTSC now checks for a constant TSC before claiming to be a usable timer. (This timer can be tested in KVM via the command-line option "-cpu host,+invtsc".) Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [arm] Add optimised TCP/IP checksumming for 64-bit ARMMichael Brown2016-05-111-19/+0Star
| | | | Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [arm] Add optimised string functions for 64-bit ARMMichael Brown2016-05-111-60/+0Star
| | | | Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [arm] Add support for 64-bit ARM (Aarch64)Michael Brown2016-05-082-14/+39
| | | | Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [arm] Split out 32-bit-specific code to arch/arm32Michael Brown2016-05-0811-812/+0Star
| | | | Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [arm] Add support for 32-bit ARMMichael Brown2016-05-0632-0/+1353
Signed-off-by: Michael Brown <mcb30@ipxe.org>