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* [dhcp] Automatically generate vendor class identifier stringMichael Brown2016-07-041-5/+0Star
| | | | | | | | | | | | The vendor class identifier strings in DHCP_ARCH_VENDOR_CLASS_ID are out of sync with the (correct) client architecture values in DHCP_ARCH_CLIENT_ARCHITECTURE. Fix by removing all definitions of DHCP_ARCH_VENDOR_CLASS_ID, and instead generating the vendor class identifier string automatically based on DHCP_ARCH_CLIENT_ARCHITECTURE and DHCP_ARCH_CLIENT_NDI. Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [dhcp] Allow for variable encapsulation of architecture-specific optionsMichael Brown2016-07-041-7/+6Star
| | | | | | | | | | | | | DHCPv4 and DHCPv6 share some values in common for the architecture- specific options (such as the client system architecture type), but use different encapsulations: DHCPv4 has a single byte for the option length while DHCPv6 has a 16-bit field for the option length. Move the containing DHCP_OPTION() and related wrappers from the individual dhcp_arch.h files to dhcp.c, thus allowing for the architecture-specific values to be reused in dhcpv6.c. Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [arm] Use correct DHCP client architecture valuesMichael Brown2016-05-261-1/+1
| | | | Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [arm] Use CNTVCT_EL0 as profiling timestampMichael Brown2016-05-121-3/+1Star
| | | | | | | | | | | | The raw cycle counter at PMCCNTR_EL0 works in qemu but seems to always read as zero on physical hardware (tested on Juno r1 and Cavium ThunderX), even after ensuring that PMCR_EL0.E and PMCNTENSET_EL0.C are both enabled. Use CNTVCT_EL0 instead; this seems to count at a lower resolution (tens of CPU cycles), but is usable for profiling. Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [arm] Add optimised TCP/IP checksumming for 64-bit ARMMichael Brown2016-05-111-0/+15
| | | | Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [arm] Add optimised string functions for 64-bit ARMMichael Brown2016-05-111-0/+106
| | | | Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [arm] Add support for 64-bit ARM (Aarch64)Michael Brown2016-05-0811-0/+794
Signed-off-by: Michael Brown <mcb30@ipxe.org>