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* [xhci] Undo PCH-specific quirk fixes when removing deviceMichael Brown2015-03-062-17/+51
| | | | | | | | Restore the original values of XUSB2PR and USB3PSSEN, in case we are booting an OS with no support for xHCI. Suggested-by: Dan Ellis <Dan.Ellis@displaylink.com> Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [xhci] Enable USB3 ports on Intel PCH8/PCH9 controllersMichael Brown2015-03-062-0/+55
| | | | | | | | | | Intel PCH controllers default to routing USB2 ports to EHCI rather than xHCI, and default to disabling SuperSpeed connections. Manipulate the PCI configuration space registers as necessary to reroute ports and enable SuperSpeed. Originally-fixed-by: Dan Ellis <Dan.Ellis@displaylink.com> Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [legal] Relicense files under GPL2_OR_LATER_OR_UBDLMichael Brown2015-03-025-5/+17
| | | | | | | Relicense files for which I am the sole author (as identified by util/relicense.pl). Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [xhci] Abort commands on timeoutMichael Brown2015-02-182-15/+82
| | | | | | | | | | | | When a command times out, abort it (via the Command Abort bit in the Command Ring Control Register) so that subsequent commands may execute as expected. This improves robustness when a device fails to respond to the Set Address command, since the subsequent Disable Slot command will now succeed. Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [xhci] Leak memory if controller fails to disable slotMichael Brown2015-02-181-3/+18
| | | | | | | | | | | | | | | | If the Disable Slot command fails then the hardware may continue to write to the slot context. Leak the memory used by the slot context to avoid future memory corruption. This situation has been observed in practice when a Set Address command fails, causing the command ring to become temporarily unresponsive. Note that there is no need to similarly leak memory on the failure path in xhci_device_open(), since in the event of a failure the hardware is never informed of the slot context address. Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [usb] Add generic USB network device frameworkMichael Brown2015-02-171-0/+280
| | | | Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [usb] Use generic refill framework for USB hub interrupt endpointsMichael Brown2015-02-132-51/+7Star
| | | | Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [xhci] Delay after (possibly) forcing port link state to RxDetectMichael Brown2015-02-112-0/+8
| | | | | | | | | | | | Some xHCI controllers (observed with a Renesas Electronics PCIe USB3 card) seem to require a delay after forcing the link state of USB3 ports to RxDetect. Omitting this delay causes strange behaviour including system lockups. Add an unconditional 20ms delay after writing the port link states. This seems to be sufficient to avoid the problem. Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [usb] Allow usb_stream() to enforce a terminating short packetMichael Brown2015-02-102-7/+17
| | | | | | | | | | Some USB endpoints require that a short packet be used to terminate transfers, since they have no other way to determine message boundaries. If the message length happens to be an exact multiple of the USB packet size, then this requires the use of an additional zero-length packet. Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [usb] Parse endpoint descriptor bInterval fieldMichael Brown2015-02-102-0/+15
| | | | Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [usb] Report xHCI host controller eventsMichael Brown2015-02-052-0/+41
| | | | Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [usb] Add support for xHCI host controllersMichael Brown2015-02-032-0/+4075
| | | | Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [usb] Add basic support for USB hubsMichael Brown2015-02-032-0/+800
Signed-off-by: Michael Brown <mcb30@ipxe.org>
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