From cd54e7c844e2148b46c960d72ed853f8f75bf400 Mon Sep 17 00:00:00 2001 From: Michael Brown Date: Mon, 28 Oct 2024 13:48:11 +0000 Subject: [riscv] Add support for RDTIME as a timer source The Zicntr extension defines an unprivileged wall-clock time CSR that roughly matches the behaviour of an invariant TSC on x86. The nominal frequency of this timer may be read from the "timebase-frequency" property of the CPU node in the device tree. Add a timer source using RDTIME to provide implementations of udelay() and currticks(), modelled on the existing RDTSC-based timer for x86. Signed-off-by: Michael Brown --- src/arch/riscv/include/bits/errfile.h | 1 + 1 file changed, 1 insertion(+) (limited to 'src/arch/riscv/include') diff --git a/src/arch/riscv/include/bits/errfile.h b/src/arch/riscv/include/bits/errfile.h index 03f98c206..62288ad9c 100644 --- a/src/arch/riscv/include/bits/errfile.h +++ b/src/arch/riscv/include/bits/errfile.h @@ -16,6 +16,7 @@ FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL ); #define ERRFILE_sbi_reboot ( ERRFILE_ARCH | ERRFILE_CORE | 0x00000000 ) #define ERRFILE_hart ( ERRFILE_ARCH | ERRFILE_CORE | 0x00010000 ) +#define ERRFILE_zicntr ( ERRFILE_ARCH | ERRFILE_CORE | 0x00020000 ) /** @} */ -- cgit v1.2.3-55-g7522