From bbabde8ff8182fcef738893c29a698783758a489 Mon Sep 17 00:00:00 2001 From: Michael Brown Date: Thu, 10 Jul 2025 14:33:34 +0100 Subject: [riscv] Invalidate data cache on completed RX DMA buffers The data cache must be invalidated twice for RX DMA buffers: once before passing ownership to the DMA device (in case the cache happens to contain dirty data that will be written back at an undefined future point), and once after receiving ownership from the DMA device (in case the CPU happens to have speculatively accessed data in the buffer while it was owned by the hardware). Only the used portion of the buffer needs to be invalidated after completion, since we do not care about data within the unused portion. Update the DMA API to include the used length as an additional parameter to dma_unmap(), and add the necessary second cache invalidation pass to the RISC-V DMA API implementation. Signed-off-by: Michael Brown --- src/drivers/net/intelxl.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/drivers') diff --git a/src/drivers/net/intelxl.c b/src/drivers/net/intelxl.c index 1d4c22a09..31a3e2577 100644 --- a/src/drivers/net/intelxl.c +++ b/src/drivers/net/intelxl.c @@ -90,7 +90,7 @@ int intelxl_msix_enable ( struct intelxl_nic *intelxl, pci_msix_disable ( pci, &intelxl->msix.cap ); err_enable: - dma_unmap ( &intelxl->msix.map ); + dma_unmap ( &intelxl->msix.map, sizeof ( intelxl->msix.msg ) ); err_map: return rc; } @@ -112,7 +112,7 @@ void intelxl_msix_disable ( struct intelxl_nic *intelxl, pci_msix_disable ( pci, &intelxl->msix.cap ); /* Unmap dummy target location */ - dma_unmap ( &intelxl->msix.map ); + dma_unmap ( &intelxl->msix.map, sizeof ( intelxl->msix.msg ) ); } /****************************************************************************** -- cgit v1.2.3-55-g7522