summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorRegia König2021-06-02 17:26:09 +0200
committerRegia König2021-06-02 17:26:09 +0200
commit85b72411ce04fd77b6c0a7b12d7cdd13dc2706fc (patch)
tree999dc1bade76809aa363a540e0b1f603acbcecc1
parentTry to get controller-name (diff)
downloadmemtest86-85b72411ce04fd77b6c0a7b12d7cdd13dc2706fc.tar.gz
memtest86-85b72411ce04fd77b6c0a7b12d7cdd13dc2706fc.tar.xz
memtest86-85b72411ce04fd77b6c0a7b12d7cdd13dc2706fc.zip
Backup
-rw-r--r--efi_memtest/MemtestEfi.c1
-rw-r--r--efi_memtest/memtest86+/controller.c168
-rw-r--r--efi_memtest/memtest86+/error.c8
3 files changed, 111 insertions, 66 deletions
diff --git a/efi_memtest/MemtestEfi.c b/efi_memtest/MemtestEfi.c
index 558aa33..7110698 100644
--- a/efi_memtest/MemtestEfi.c
+++ b/efi_memtest/MemtestEfi.c
@@ -17,6 +17,7 @@ short log_memspeed = 0;
short log_mem_tbl = 0;
short log_comp_seg = 0;
short log_print_pmap = 0;
+short log_mem_ctrl = 1;
EFI_STATUS
EFIAPI
diff --git a/efi_memtest/memtest86+/controller.c b/efi_memtest/memtest86+/controller.c
index ce41e61..0313d52 100644
--- a/efi_memtest/memtest86+/controller.c
+++ b/efi_memtest/memtest86+/controller.c
@@ -24,6 +24,11 @@ int nhm_bus = 0x3F;
extern ulong extclock;
extern unsigned long imc_type;
extern struct cpu_ident cpu_id;
+
+extern short logflag;
+extern short log_mem_ctrl;
+
+
/*
#define rdmsr(msr,val1,val2) \
__asm__ __volatile__("rdmsr" \
@@ -235,6 +240,8 @@ void print_ram_line(float cas, int rcd, int rp, int ras, int chan)
static void poll_fsb_nothing(void)
{
+ print_log("poll_fsb_nothing", 16);
+
char *name;
/* Print the controller name */
@@ -4074,71 +4081,104 @@ struct pci_memory_controller controllers[] = {
{ 0xFFFF, 0x0105, "AMD K16 IMC","", 0, poll_fsb_k16, poll_timings_k16, setup_apu, poll_nothing }
};
-/*static void print_memory_controller(void)
+static void print_memory_controller(void)
{
+
+
+
+ // TODO REMOVE
+ /* Print advanced caracteristics */
+ col2 = 0;
+
+ print_log("print_controller(): 1sd", 23);
+
{
- char log[] = "\nprint_memory_controller() started.";
- print_log(log, sizeof(log) - 1);
- }*/
+ char log[23] = "ctrl.index = ";
+ int length = 13;
+ int_to_charr(ctrl.index, log, &length);
+ print_log(log, length);
+ }
+
+ controllers[ctrl.index].poll_fsb();
+
+ print_log("print_controller(): 2sd", 23);
+ // TODO REMOVE UNTIL HERE
+
+
+ if (logflag && log_mem_ctrl) {
+ char log[] = "\nprint_memory_controller() started.";
+ print_log(log, sizeof(log) - 1);
+ }
/* Print memory controller info */
- /* if (ctrl.index == 0) {
+ if (ctrl.index == 0) {
+ if (logflag && log_mem_ctrl) {
+ print_log("ctrl.index = 0", 14);
+ }
return;
- }*/
+ }
/* Now print the memory controller capabilities */
- /*
- cprint(LINE_CPU+5, col, " "); col++;
- if (ctrl.cap == ECC_UNKNOWN) {
- return;
- }
- if (ctrl.cap & __ECC_DETECT) {
- int on;
- on = ctrl.mode & __ECC_DETECT;
- cprint(LINE_CPU+5, col, "(ECC : ");
- cprint(LINE_CPU+5, col +7, on?"Detect":"Disabled)");
- on?(col += 13):(col += 16);
- }
- if (ctrl.mode & __ECC_CORRECT) {
- int on;
- on = ctrl.mode & __ECC_CORRECT;
- cprint(LINE_CPU+5, col, " / ");
- if (ctrl.cap & __ECC_CHIPKILL) {
- cprint(LINE_CPU+5, col +3, on?"Correct -":"");
- on?(col += 12):(col +=3);
- } else {
- cprint(LINE_CPU+5, col +3, on?"Correct)":"");
- on?(col += 11):(col +=3);
- }
- }
- if (ctrl.mode & __ECC_DETECT) {
- if (ctrl.cap & __ECC_CHIPKILL) {
- int on;
- on = ctrl.mode & __ECC_CHIPKILL;
- cprint(LINE_CPU+5, col, " Chipkill : ");
- cprint(LINE_CPU+5, col +12, on?"On)":"Off)");
- on?(col += 15):(col +=16);
- }}
- if (ctrl.mode & __ECC_SCRUB) {
- int on;
- on = ctrl.mode & __ECC_SCRUB;
- cprint(LINE_CPU+5, col, " Scrub");
- cprint(LINE_CPU+5, col +6, on?"+ ":"- ");
- col += 7;
- }
- if (ctrl.cap & __ECC_UNEXPECTED) {
- int on;
- on = ctrl.mode & __ECC_UNEXPECTED;
- cprint(LINE_CPU+5, col, "Unknown");
- cprint(LINE_CPU+5, col +7, on?"+ ":"- ");
- col += 9;
- }
- */
+ cprint(LINE_CPU+5, col, " "); col++;
+ if (ctrl.cap == ECC_UNKNOWN) {
+ if (logflag && log_mem_ctrl) {
+ print_log("ctrl.cap == ECC_UNKNOWN", 23);
+ }
+ return;
+ }
+
+ if (ctrl.cap & __ECC_DETECT) {
+ int on;
+ on = ctrl.mode & __ECC_DETECT;
+ cprint(LINE_CPU+5, col, "(ECC : ");
+ cprint(LINE_CPU+5, col +7, on?"Detect":"Disabled)");
+ on?(col += 13):(col += 16);
+ }
+
+ if (ctrl.mode & __ECC_CORRECT) {
+ int on;
+ on = ctrl.mode & __ECC_CORRECT;
+ cprint(LINE_CPU+5, col, " / ");
+
+ if (ctrl.cap & __ECC_CHIPKILL) {
+ cprint(LINE_CPU+5, col +3, on?"Correct -":"");
+ on?(col += 12):(col +=3);
+ } else {
+ cprint(LINE_CPU+5, col +3, on?"Correct)":"");
+ on?(col += 11):(col +=3);
+ }
+ }
+
+ if (ctrl.mode & __ECC_DETECT) {
+ if (ctrl.cap & __ECC_CHIPKILL) {
+ int on;
+ on = ctrl.mode & __ECC_CHIPKILL;
+ cprint(LINE_CPU+5, col, " Chipkill : ");
+ cprint(LINE_CPU+5, col +12, on?"On)":"Off)");
+ on?(col += 15):(col +=16);
+ }}
+
+ if (ctrl.mode & __ECC_SCRUB) {
+ int on;
+ on = ctrl.mode & __ECC_SCRUB;
+ cprint(LINE_CPU+5, col, " Scrub");
+ cprint(LINE_CPU+5, col +6, on?"+ ":"- ");
+ col += 7;
+ }
+
+ if (ctrl.cap & __ECC_UNEXPECTED) {
+ int on;
+ on = ctrl.mode & __ECC_UNEXPECTED;
+ cprint(LINE_CPU+5, col, "Unknown");
+ cprint(LINE_CPU+5, col +7, on?"+ ":"- ");
+ col += 9;
+ }
+
/* Print advanced caracteristics */
- /*col2 = 0;
+ col2 = 0;
print_log("print_controller(): 1sd", 22);
@@ -4151,7 +4191,7 @@ struct pci_memory_controller controllers[] = {
print_log("print_controller(): 3sd", 22);
}
-*/
+
void find_controller(void)
{
@@ -4211,7 +4251,8 @@ void find_controller(void)
print_log(log, length);
}
- print_log(controllers[ctrl.index].name, 10);
+ char* name = controllers[ctrl.index].name;
+ print_log(name, 10);
{
char log[49] = "find_controller(): controller length = ";
@@ -4229,8 +4270,8 @@ void find_controller(void)
/* Don't enable ECC polling by default unless it has
* been well tested.
*/
- //set_ecc_polling(-1);
- //print_memory_controller();
+ // set_ecc_polling(-1);
+ print_memory_controller();
print_log("5mbm", 4);
@@ -4240,13 +4281,16 @@ void find_controller(void)
void poll_errors(void)
{
+ if (logflag && log_mem_ctrl) {
+ print_log("poll_errors() started", 21);
+ }
if (ctrl.poll) {
controllers[ctrl.index].poll_errors();
}
}
-/*
- void set_ecc_polling(int val)
+
+/* void set_ecc_polling(int val)
{
int tested = controllers[ctrl.index].tested;
if (val == -1) {
@@ -4259,6 +4303,6 @@ void poll_errors(void)
ctrl.poll = 0;
cprint(LINE_INFO, COL_ECC, "off");
}
- }
-*/
+ }*/
+
diff --git a/efi_memtest/memtest86+/error.c b/efi_memtest/memtest86+/error.c
index 1151810..6bb26df 100644
--- a/efi_memtest/memtest86+/error.c
+++ b/efi_memtest/memtest86+/error.c
@@ -624,8 +624,8 @@ void do_tick(int me)
* is supported
*/
- // TODO
- /* if (cpu_id.fid.bits.rdtsc) {
+/*TODO
+ if (cpu_id.fid.bits.rdtsc) {
asm __volatile__(
"rdtsc":"=a" (l),"=d" (h));
asm __volatile__ (
@@ -660,7 +660,7 @@ void do_tick(int me)
}*/
/* Poll for ECC errors */
- /*
+
poll_errors();
- */
+
}