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authorPaul E. McKenney2014-02-11 21:28:06 +0100
committerPaul E. McKenney2014-02-17 23:56:07 +0100
commit586dd56a4c17611e3927c9ff02ab8d0a6a545b38 (patch)
tree7efa91e04d699f89b736dd642eeb183ef0e92b9d /Documentation/memory-barriers.txt
parentDocumentation/memory-barriers.txt: ACCESS_ONCE() provides cache coherence (diff)
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Documentation/memory-barriers.txt: Conditional must use prior load
A control dependency consists of a load, a conditional that depends on that load, and a store. This commit emphasizes this point in the summary. Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Reviewed-by: Josh Triplett <josh@joshtriplett.org>
Diffstat (limited to 'Documentation/memory-barriers.txt')
-rw-r--r--Documentation/memory-barriers.txt3
1 files changed, 2 insertions, 1 deletions
diff --git a/Documentation/memory-barriers.txt b/Documentation/memory-barriers.txt
index f9ff060d8320..6b25efd45583 100644
--- a/Documentation/memory-barriers.txt
+++ b/Documentation/memory-barriers.txt
@@ -724,7 +724,8 @@ In summary:
later loads, smp_mb().
(*) Control dependencies require at least one run-time conditional
- between the prior load and the subsequent store. If the compiler
+ between the prior load and the subsequent store, and this
+ conditional must involve the prior load. If the compiler
is able to optimize the conditional away, it will have also
optimized away the ordering. Careful use of ACCESS_ONCE() can
help to preserve the needed conditional.