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authorLinus Walleij2016-08-29 11:30:18 +0200
committerLinus Walleij2016-08-31 09:30:28 +0200
commite3f617602103ef674aec417d52f0cff145fc0599 (patch)
tree19bc665bd9e82ca1319acb4cd720b87b4178bfbd /arch/arm/boot
parentARM: dts: add the core module clocks to Integrator/CP (diff)
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ARM: integrator: move CP CLCD display to DTS
The Integrator/CP CLCD VGA display can now be registered fully from the device tree. Delete the board file code and add the display definition to the DTS. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/integratorcp.dts37
1 files changed, 36 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/integratorcp.dts b/arch/arm/boot/dts/integratorcp.dts
index e8299590bb6a..03d8423d3a11 100644
--- a/arch/arm/boot/dts/integratorcp.dts
+++ b/arch/arm/boot/dts/integratorcp.dts
@@ -226,7 +226,42 @@
reg = <0xC0000000 0x1000>;
interrupts = <22>;
clocks = <&auxosc>, <&pclk>;
- clock-names = "clcd", "apb_pclk";
+ clock-names = "clcdclk", "apb_pclk";
+
+ port {
+ /*
+ * The VGA connected is implemented with a
+ * THS8134A triple DAC that can be run in 24bit
+ * or 16bit RGB mode.
+ */
+ clcd_pads: endpoint {
+ remote-endpoint = <&clcd_panel>;
+ arm,pl11x,tft-r0g0b0-pads = <1 7 13>;
+ };
+ };
+
+ panel {
+ compatible = "panel-dpi";
+
+ port {
+ clcd_panel: endpoint {
+ remote-endpoint = <&clcd_pads>;
+ };
+ };
+
+ /* Standard 640x480 VGA timings */
+ panel-timing {
+ clock-frequency = <25175000>;
+ hactive = <640>;
+ hback-porch = <48>;
+ hfront-porch = <16>;
+ hsync-len = <96>;
+ vactive = <480>;
+ vback-porch = <33>;
+ vfront-porch = <10>;
+ vsync-len = <2>;
+ };
+ };
};
};
};