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author | Vladimir Murzin | 2019-01-25 15:18:37 +0100 |
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committer | Greg Kroah-Hartman | 2019-04-05 22:33:12 +0200 |
commit | d8945878ded6e5850b59e101bcc9fe4167ab7fb1 (patch) | |
tree | 02ff1d65d540903413d4480f53a3a47b9dc02cc8 /arch/arm/kernel/machine_kexec.c | |
parent | mt7601u: bump supported EEPROM version (diff) | |
download | kernel-qcow2-linux-d8945878ded6e5850b59e101bcc9fe4167ab7fb1.tar.gz kernel-qcow2-linux-d8945878ded6e5850b59e101bcc9fe4167ab7fb1.tar.xz kernel-qcow2-linux-d8945878ded6e5850b59e101bcc9fe4167ab7fb1.zip |
ARM: 8830/1: NOMMU: Toggle only bits in EXC_RETURN we are really care of
[ Upstream commit 72cd4064fccaae15ab84d40d4be23667402df4ed ]
ARMv8M introduces support for Security extension to M class, among
other things it affects exception handling, especially, encoding of
EXC_RETURN.
The new bits have been added:
Bit [6] Secure or Non-secure stack
Bit [5] Default callee register stacking
Bit [0] Exception Secure
which conflicts with hard-coded value of EXC_RETURN:
In fact, we only care of few bits:
Bit [3] Mode (0 - Handler, 1 - Thread)
Bit [2] Stack pointer selection (0 - Main, 1 - Process)
We can toggle only those bits and left other bits as they were on
exception entry.
It is basically, what patch does - saves EXC_RETURN when we do
transition form Thread to Handler mode (it is first svc), so later
saved value is used instead of EXC_RET_THREADMODE_PROCESSSTACK.
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'arch/arm/kernel/machine_kexec.c')
0 files changed, 0 insertions, 0 deletions