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| author | Will Deacon | 2018-03-27 13:04:51 +0200 |
|---|---|---|
| committer | Will Deacon | 2018-03-27 13:04:51 +0200 |
| commit | 3f251cf0abec2afb6eca67f71380670dd55bdebe (patch) | |
| tree | e2ebead8eb4ed13267839d8710749154d77545d7 /arch/arm64/mm | |
| parent | arm64: cpufeature: Avoid warnings due to unused symbols (diff) | |
| download | kernel-qcow2-linux-3f251cf0abec2afb6eca67f71380670dd55bdebe.tar.gz kernel-qcow2-linux-3f251cf0abec2afb6eca67f71380670dd55bdebe.tar.xz kernel-qcow2-linux-3f251cf0abec2afb6eca67f71380670dd55bdebe.zip | |
Revert "arm64: Revert L1_CACHE_SHIFT back to 6 (64-byte cache line size)"
This reverts commit 1f85b42a691cd8329ba82dbcaeec80ac1231b32a.
The internal dma-direct.h API has changed in -next, which collides with
us trying to use it to manage non-coherent DMA devices on systems with
unreasonably large cache writeback granules.
This isn't at all trivial to resolve, so revert our changes for now and
we can revisit this after the merge window. Effectively, this just
restores our behaviour back to that of 4.16.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/mm')
| -rw-r--r-- | arch/arm64/mm/dma-mapping.c | 17 | ||||
| -rw-r--r-- | arch/arm64/mm/init.c | 3 |
2 files changed, 1 insertions, 19 deletions
diff --git a/arch/arm64/mm/dma-mapping.c b/arch/arm64/mm/dma-mapping.c index 1e9dac8684ca..a96ec0181818 100644 --- a/arch/arm64/mm/dma-mapping.c +++ b/arch/arm64/mm/dma-mapping.c @@ -33,7 +33,6 @@ #include <asm/cacheflush.h> static int swiotlb __ro_after_init; -DEFINE_STATIC_KEY_FALSE(swiotlb_noncoherent_bounce); static pgprot_t __get_dma_pgprot(unsigned long attrs, pgprot_t prot, bool coherent) @@ -505,14 +504,6 @@ static int __init arm64_dma_init(void) max_pfn > (arm64_dma_phys_limit >> PAGE_SHIFT)) swiotlb = 1; - if (WARN_TAINT(ARCH_DMA_MINALIGN < cache_line_size(), - TAINT_CPU_OUT_OF_SPEC, - "ARCH_DMA_MINALIGN smaller than CTR_EL0.CWG (%d < %d)", - ARCH_DMA_MINALIGN, cache_line_size())) { - swiotlb = 1; - static_branch_enable(&swiotlb_noncoherent_bounce); - } - return atomic_pool_init(); } arch_initcall(arm64_dma_init); @@ -891,14 +882,6 @@ static void __iommu_setup_dma_ops(struct device *dev, u64 dma_base, u64 size, void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size, const struct iommu_ops *iommu, bool coherent) { - /* - * Enable swiotlb for buffer bouncing if ARCH_DMA_MINALIGN < CWG. - * dma_capable() forces the actual bounce if the device is - * non-coherent. - */ - if (static_branch_unlikely(&swiotlb_noncoherent_bounce) && !coherent) - iommu = NULL; - if (!dev->dma_ops) dev->dma_ops = &arm64_swiotlb_dma_ops; diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c index 664acf177799..9f3c47acf8ff 100644 --- a/arch/arm64/mm/init.c +++ b/arch/arm64/mm/init.c @@ -586,8 +586,7 @@ static void __init free_unused_memmap(void) void __init mem_init(void) { if (swiotlb_force == SWIOTLB_FORCE || - max_pfn > (arm64_dma_phys_limit >> PAGE_SHIFT) || - ARCH_DMA_MINALIGN < cache_line_size()) + max_pfn > (arm64_dma_phys_limit >> PAGE_SHIFT)) swiotlb_init(1); else swiotlb_force = SWIOTLB_NO_FORCE; |