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author | Linus Torvalds | 2013-05-10 16:21:16 +0200 |
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committer | Linus Torvalds | 2013-05-10 16:21:16 +0200 |
commit | f5b8fcb48b9eb1a02f6a3a679da913f6c467527c (patch) | |
tree | 4e67c46f5ebc0acf8c29ce01c711b84352a617f3 /arch/blackfin/mach-bf609 | |
parent | Merge branch 'next' of git://git.monstr.eu/linux-2.6-microblaze (diff) | |
parent | bfin cache: dcplb map: add 16M dcplb map for BF60x (diff) | |
download | kernel-qcow2-linux-f5b8fcb48b9eb1a02f6a3a679da913f6c467527c.tar.gz kernel-qcow2-linux-f5b8fcb48b9eb1a02f6a3a679da913f6c467527c.tar.xz kernel-qcow2-linux-f5b8fcb48b9eb1a02f6a3a679da913f6c467527c.zip |
Merge tag 'for-linus' of git://github.com/realmz/blackfin-linux
Pull blackfin updates from Steven Miao.
* tag 'for-linus' of git://github.com/realmz/blackfin-linux:
bfin cache: dcplb map: add 16M dcplb map for BF60x
blackfin: smp: fix smp build after drop asm/system.h
blackfin: fix bootup core clock and system clock display
Platform Nand: Set the GPIO for NAND read as input
blackfin: rename vmImage to uImage after we move to buildroot
blackfin: twi: Remove bogus #endif
bf609: rsi: Add bf609 rsi MMR macro and board platform data.
blackfin: dmc: Improve DDR2 write through in DMC effict controller.
Diffstat (limited to 'arch/blackfin/mach-bf609')
-rw-r--r-- | arch/blackfin/mach-bf609/include/mach/cdefBF60x_base.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/blackfin/mach-bf609/include/mach/cdefBF60x_base.h b/arch/blackfin/mach-bf609/include/mach/cdefBF60x_base.h index 4954cf3f7e16..102ee4025ac9 100644 --- a/arch/blackfin/mach-bf609/include/mach/cdefBF60x_base.h +++ b/arch/blackfin/mach-bf609/include/mach/cdefBF60x_base.h @@ -312,6 +312,8 @@ #define bfin_write_DMC0_EMR1(val) bfin_write32(DMC0_EMR1, val) #define bfin_read_DMC0_CTL() bfin_read32(DMC0_CTL) #define bfin_write_DMC0_CTL(val) bfin_write32(DMC0_CTL, val) +#define bfin_read_DMC0_EFFCTL() bfin_read32(DMC0_EFFCTL) +#define bfin_write_DMC0_EFFCTL(val) bfin_write32(DMC0_EFFCTL, val) #define bfin_read_DMC0_STAT() bfin_read32(DMC0_STAT) #define bfin_write_DMC0_STAT(val) bfin_write32(DMC0_STAT, val) #define bfin_read_DMC0_DLLCTL() bfin_read32(DMC0_DLLCTL) |