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| author | David S. Miller | 2018-05-21 22:01:54 +0200 |
|---|---|---|
| committer | David S. Miller | 2018-05-21 22:01:54 +0200 |
| commit | 6f6e434aa267a6030477876d89444fe3a6b7a48d (patch) | |
| tree | 67755c422f1e85451aa646eae21d4c6f3f389d9f /arch/mips/kernel/ptrace32.c | |
| parent | vmcore: move get_vmcore_size out of __init (diff) | |
| parent | Merge tag 'mips_fixes_4.17_2' of git://git.kernel.org/pub/scm/linux/kernel/gi... (diff) | |
| download | kernel-qcow2-linux-6f6e434aa267a6030477876d89444fe3a6b7a48d.tar.gz kernel-qcow2-linux-6f6e434aa267a6030477876d89444fe3a6b7a48d.tar.xz kernel-qcow2-linux-6f6e434aa267a6030477876d89444fe3a6b7a48d.zip | |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
S390 bpf_jit.S is removed in net-next and had changes in 'net',
since that code isn't used any more take the removal.
TLS data structures split the TX and RX components in 'net-next',
put the new struct members from the bug fix in 'net' into the RX
part.
The 'net-next' tree had some reworking of how the ERSPAN code works in
the GRE tunneling code, overlapping with a one-line headroom
calculation fix in 'net'.
Overlapping changes in __sock_map_ctx_update_elem(), keep the bits
that read the prog members via READ_ONCE() into local variables
before using them.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/mips/kernel/ptrace32.c')
| -rw-r--r-- | arch/mips/kernel/ptrace32.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/kernel/ptrace32.c b/arch/mips/kernel/ptrace32.c index 2b9260f92ccd..656a137c1fe2 100644 --- a/arch/mips/kernel/ptrace32.c +++ b/arch/mips/kernel/ptrace32.c @@ -99,7 +99,7 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request, break; } fregs = get_fpu_regs(child); - if (test_thread_flag(TIF_32BIT_FPREGS)) { + if (test_tsk_thread_flag(child, TIF_32BIT_FPREGS)) { /* * The odd registers are actually the high * order bits of the values stored in the even @@ -212,7 +212,7 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request, sizeof(child->thread.fpu)); child->thread.fpu.fcr31 = 0; } - if (test_thread_flag(TIF_32BIT_FPREGS)) { + if (test_tsk_thread_flag(child, TIF_32BIT_FPREGS)) { /* * The odd registers are actually the high * order bits of the values stored in the even |