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author | Frederic Weisbecker | 2009-10-18 01:09:09 +0200 |
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committer | Frederic Weisbecker | 2009-10-18 01:12:33 +0200 |
commit | 0f8f86c7bdd1c954fbe153af437a0d91a6c5721a (patch) | |
tree | 94a8d419a470a4f9852ca397bb9bbe48db92ff5c /arch/powerpc/boot/dts/arches.dts | |
parent | Merge branch 'linus' into tracing/hw-breakpoints (diff) | |
parent | perf tools: Move dereference after NULL test (diff) | |
download | kernel-qcow2-linux-0f8f86c7bdd1c954fbe153af437a0d91a6c5721a.tar.gz kernel-qcow2-linux-0f8f86c7bdd1c954fbe153af437a0d91a6c5721a.tar.xz kernel-qcow2-linux-0f8f86c7bdd1c954fbe153af437a0d91a6c5721a.zip |
Merge commit 'perf/core' into perf/hw-breakpoint
Conflicts:
kernel/Makefile
kernel/trace/Makefile
kernel/trace/trace.h
samples/Makefile
Merge reason: We need to be uptodate with the perf events development
branch because we plan to rewrite the breakpoints API on top of
perf events.
Diffstat (limited to 'arch/powerpc/boot/dts/arches.dts')
-rw-r--r-- | arch/powerpc/boot/dts/arches.dts | 50 |
1 files changed, 50 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/arches.dts b/arch/powerpc/boot/dts/arches.dts index d9113b1e8c1d..414ef8b7e575 100644 --- a/arch/powerpc/boot/dts/arches.dts +++ b/arch/powerpc/boot/dts/arches.dts @@ -124,6 +124,16 @@ dcr-reg = <0x00c 0x002>; }; + L2C0: l2c { + compatible = "ibm,l2-cache-460gt", "ibm,l2-cache"; + dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */ + 0x030 0x008>; /* L2 cache DCR's */ + cache-line-size = <32>; /* 32 bytes */ + cache-size = <262144>; /* L2, 256K */ + interrupt-parent = <&UIC1>; + interrupts = <11 1>; + }; + plb { compatible = "ibm,plb-460gt", "ibm,plb4"; #address-cells = <2>; @@ -168,6 +178,38 @@ /* ranges property is supplied by U-Boot */ interrupts = <0x6 0x4>; interrupt-parent = <&UIC1>; + + nor_flash@0,0 { + compatible = "amd,s29gl256n", "cfi-flash"; + bank-width = <2>; + reg = <0x00000000 0x00000000 0x02000000>; + #address-cells = <1>; + #size-cells = <1>; + partition@0 { + label = "kernel"; + reg = <0x00000000 0x001e0000>; + }; + partition@1e0000 { + label = "dtb"; + reg = <0x001e0000 0x00020000>; + }; + partition@200000 { + label = "root"; + reg = <0x00200000 0x00200000>; + }; + partition@400000 { + label = "user"; + reg = <0x00400000 0x01b60000>; + }; + partition@1f60000 { + label = "env"; + reg = <0x01f60000 0x00040000>; + }; + partition@1fa0000 { + label = "u-boot"; + reg = <0x01fa0000 0x00060000>; + }; + }; }; UART0: serial@ef600300 { @@ -186,6 +228,14 @@ reg = <0xef600700 0x00000014>; interrupt-parent = <&UIC0>; interrupts = <0x2 0x4>; + #address-cells = <1>; + #size-cells = <0>; + sttm@4a { + compatible = "ad,ad7414"; + reg = <0x4a>; + interrupt-parent = <&UIC1>; + interrupts = <0x0 0x8>; + }; }; IIC1: i2c@ef600800 { |