diff options
| author | Linus Walleij | 2018-03-06 08:56:06 +0100 |
|---|---|---|
| committer | Linus Walleij | 2018-03-19 01:50:29 +0100 |
| commit | 7a8fd1f5cc3fd0a8fd06634b9dc6750f8c5b2354 (patch) | |
| tree | 5943f76dd8c02afffa4f32fb4a50b6641325794e /drivers/gpio/gpio-ich.c | |
| parent | gpio: ich: Include the right header (diff) | |
| download | kernel-qcow2-linux-7a8fd1f5cc3fd0a8fd06634b9dc6750f8c5b2354.tar.gz kernel-qcow2-linux-7a8fd1f5cc3fd0a8fd06634b9dc6750f8c5b2354.tar.xz kernel-qcow2-linux-7a8fd1f5cc3fd0a8fd06634b9dc6750f8c5b2354.zip | |
gpio: ich: Use BIT() macro
Using BIT() makes (1 << foo) constructions easier to read, and
also account for common mistakes where bit 31 is not working
because of numbers being interpreted as negative unless
specified as unsigned.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/gpio/gpio-ich.c')
| -rw-r--r-- | drivers/gpio/gpio-ich.c | 17 |
1 files changed, 9 insertions, 8 deletions
diff --git a/drivers/gpio/gpio-ich.c b/drivers/gpio/gpio-ich.c index 7a54165d7276..dba392221042 100644 --- a/drivers/gpio/gpio-ich.c +++ b/drivers/gpio/gpio-ich.c @@ -26,6 +26,7 @@ #include <linux/gpio/driver.h> #include <linux/platform_device.h> #include <linux/mfd/lpc_ich.h> +#include <linux/bitops.h> #define DRV_NAME "gpio_ich" @@ -131,9 +132,9 @@ static int ichx_write_bit(int reg, unsigned nr, int val, int verify) ichx_priv.gpio_base); if (val) - data |= 1 << bit; + data |= BIT(bit); else - data &= ~(1 << bit); + data &= ~BIT(bit); ICHX_WRITE(data, ichx_priv.desc->regs[reg][reg_nr], ichx_priv.gpio_base); if (reg == GPIO_LVL && ichx_priv.desc->use_outlvl_cache) @@ -166,12 +167,12 @@ static int ichx_read_bit(int reg, unsigned nr) spin_unlock_irqrestore(&ichx_priv.lock, flags); - return data & (1 << bit) ? 1 : 0; + return !!(data & BIT(bit)); } static bool ichx_gpio_check_available(struct gpio_chip *gpio, unsigned nr) { - return !!(ichx_priv.use_gpio & (1 << (nr / 32))); + return !!(ichx_priv.use_gpio & BIT(nr / 32)); } static int ichx_gpio_get_direction(struct gpio_chip *gpio, unsigned nr) @@ -232,12 +233,12 @@ static int ich6_gpio_get(struct gpio_chip *chip, unsigned nr) spin_lock_irqsave(&ichx_priv.lock, flags); /* GPI 0 - 15 are latched, write 1 to clear*/ - ICHX_WRITE(1 << (16 + nr), 0, ichx_priv.pm_base); + ICHX_WRITE(BIT(16 + nr), 0, ichx_priv.pm_base); data = ICHX_READ(0, ichx_priv.pm_base); spin_unlock_irqrestore(&ichx_priv.lock, flags); - return (data >> 16) & (1 << nr) ? 1 : 0; + return !!((data >> 16) & BIT(nr)); } else { return ichx_gpio_get(chip, nr); } @@ -254,7 +255,7 @@ static int ichx_gpio_request(struct gpio_chip *chip, unsigned nr) * the chipset's USE value can be trusted for this specific bit. * If it can't be trusted, assume that the pin can be used as a GPIO. */ - if (ichx_priv.desc->use_sel_ignore[nr / 32] & (1 << (nr & 0x1f))) + if (ichx_priv.desc->use_sel_ignore[nr / 32] & BIT(nr & 0x1f)) return 0; return ichx_read_bit(GPIO_USE_SEL, nr) ? 0 : -ENODEV; @@ -394,7 +395,7 @@ static int ichx_gpio_request_regions(struct device *dev, return -ENODEV; for (i = 0; i < ARRAY_SIZE(ichx_priv.desc->regs[0]); i++) { - if (!(use_gpio & (1 << i))) + if (!(use_gpio & BIT(i))) continue; if (!devm_request_region(dev, res_base->start + ichx_priv.desc->regs[0][i], |