diff options
| author | Alex Deucher | 2016-10-13 22:07:03 +0200 |
|---|---|---|
| committer | Alex Deucher | 2016-10-14 17:51:04 +0200 |
| commit | da146d3b5262c1866c868b9dec1bd0f834d6ded6 (patch) | |
| tree | 193192d0c84b24c26f9e01c510dc4e913a289428 /drivers/gpu/drm/amd/amdgpu/dce_v10_0.c | |
| parent | drm/amdgpu/si_dpm: Limit clocks on HD86xx part (diff) | |
| download | kernel-qcow2-linux-da146d3b5262c1866c868b9dec1bd0f834d6ded6.tar.gz kernel-qcow2-linux-da146d3b5262c1866c868b9dec1bd0f834d6ded6.tar.xz kernel-qcow2-linux-da146d3b5262c1866c868b9dec1bd0f834d6ded6.zip | |
drm/amdgpu: fix amdgpu_need_full_reset (v2)
IP types are not an index. Each asic may have number and
type of IPs. Properly check the the type rather than
using the type id as an index.
v2: fix all the IPs to not use IP type as an idx as well.
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/dce_v10_0.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/dce_v10_0.c | 12 |
1 files changed, 2 insertions, 10 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c index 613ebb7ed50f..4108c686aa7c 100644 --- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c +++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c @@ -3188,16 +3188,11 @@ static int dce_v10_0_wait_for_idle(void *handle) return 0; } -static int dce_v10_0_check_soft_reset(void *handle) +static bool dce_v10_0_check_soft_reset(void *handle) { struct amdgpu_device *adev = (struct amdgpu_device *)handle; - if (dce_v10_0_is_display_hung(adev)) - adev->ip_block_status[AMD_IP_BLOCK_TYPE_DCE].hang = true; - else - adev->ip_block_status[AMD_IP_BLOCK_TYPE_DCE].hang = false; - - return 0; + return dce_v10_0_is_display_hung(adev); } static int dce_v10_0_soft_reset(void *handle) @@ -3205,9 +3200,6 @@ static int dce_v10_0_soft_reset(void *handle) u32 srbm_soft_reset = 0, tmp; struct amdgpu_device *adev = (struct amdgpu_device *)handle; - if (!adev->ip_block_status[AMD_IP_BLOCK_TYPE_DCE].hang) - return 0; - if (dce_v10_0_is_display_hung(adev)) srbm_soft_reset |= SRBM_SOFT_RESET__SOFT_RESET_DC_MASK; |