diff options
| author | monk.liu | 2015-06-02 09:50:33 +0200 |
|---|---|---|
| committer | Alex Deucher | 2015-06-04 03:04:00 +0200 |
| commit | d9b5327ad757164418e8d4e260a343377e99f205 (patch) | |
| tree | b8cf080d0c141be5f361f516f838ef5435adef69 /drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | |
| parent | drm/amdgpu: add HEVC/H.265 UVD support (diff) | |
| download | kernel-qcow2-linux-d9b5327ad757164418e8d4e260a343377e99f205.tar.gz kernel-qcow2-linux-d9b5327ad757164418e8d4e260a343377e99f205.tar.xz kernel-qcow2-linux-d9b5327ad757164418e8d4e260a343377e99f205.zip | |
drm/amdgpu: fix no hdp flush for compute ring
No pfp on compute.
Signed-off-by: monk.liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c index 58a20be93c14..ed2f35de1d4f 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c @@ -2376,6 +2376,7 @@ static int gfx_v7_0_ring_test_ring(struct amdgpu_ring *ring) static void gfx_v7_0_ring_emit_hdp_flush(struct amdgpu_ring *ring) { u32 ref_and_mask; + int usepfp = ring->type == AMDGPU_RING_TYPE_COMPUTE ? 0 : 1; if (ring->type == AMDGPU_RING_TYPE_COMPUTE) { switch (ring->me) { @@ -2395,7 +2396,7 @@ static void gfx_v7_0_ring_emit_hdp_flush(struct amdgpu_ring *ring) amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); amdgpu_ring_write(ring, (WAIT_REG_MEM_OPERATION(1) | /* write, wait, write */ WAIT_REG_MEM_FUNCTION(3) | /* == */ - WAIT_REG_MEM_ENGINE(1))); /* pfp */ + WAIT_REG_MEM_ENGINE(usepfp))); /* pfp or me */ amdgpu_ring_write(ring, mmGPU_HDP_FLUSH_REQ); amdgpu_ring_write(ring, mmGPU_HDP_FLUSH_DONE); amdgpu_ring_write(ring, ref_and_mask); @@ -5522,6 +5523,7 @@ static const struct amdgpu_ring_funcs gfx_v7_0_ring_funcs_compute = { .emit_semaphore = gfx_v7_0_ring_emit_semaphore, .emit_vm_flush = gfx_v7_0_ring_emit_vm_flush, .emit_gds_switch = gfx_v7_0_ring_emit_gds_switch, + .emit_hdp_flush = gfx_v7_0_ring_emit_hdp_flush, .test_ring = gfx_v7_0_ring_test_ring, .test_ib = gfx_v7_0_ring_test_ib, .is_lockup = gfx_v7_0_ring_is_lockup, |