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| author | Alex Deucher | 2018-04-10 17:15:26 +0200 |
|---|---|---|
| committer | Alex Deucher | 2018-05-15 20:43:11 +0200 |
| commit | 5eeae247d227c448d4db8f60ce184ddb0e0feca0 (patch) | |
| tree | 8e16eeaef325e7bc03ab2a115967e140efae78bf /drivers/gpu/drm/amd/amdgpu/soc15.c | |
| parent | drm/ttm: keep a reference to transfer pipelined BOs (diff) | |
| download | kernel-qcow2-linux-5eeae247d227c448d4db8f60ce184ddb0e0feca0.tar.gz kernel-qcow2-linux-5eeae247d227c448d4db8f60ce184ddb0e0feca0.tar.xz kernel-qcow2-linux-5eeae247d227c448d4db8f60ce184ddb0e0feca0.zip | |
drm/amdgpu/gfx9: cache DB_DEBUG2 and make it available to userspace
Userspace needs to query this value to work around a hw bug in
certain cases.
Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/soc15.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/soc15.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c index 2e9ebe8db5cc..65e781f05c24 100644 --- a/drivers/gpu/drm/amd/amdgpu/soc15.c +++ b/drivers/gpu/drm/amd/amdgpu/soc15.c @@ -287,6 +287,7 @@ static struct soc15_allowed_register_entry soc15_allowed_read_registers[] = { { SOC15_REG_ENTRY(GC, 0, mmCP_CPC_STALLED_STAT1)}, { SOC15_REG_ENTRY(GC, 0, mmCP_CPC_STATUS)}, { SOC15_REG_ENTRY(GC, 0, mmGB_ADDR_CONFIG)}, + { SOC15_REG_ENTRY(GC, 0, mmDB_DEBUG2)}, }; static uint32_t soc15_read_indexed_register(struct amdgpu_device *adev, u32 se_num, @@ -315,6 +316,8 @@ static uint32_t soc15_get_register_value(struct amdgpu_device *adev, } else { if (reg_offset == SOC15_REG_OFFSET(GC, 0, mmGB_ADDR_CONFIG)) return adev->gfx.config.gb_addr_config; + else if (reg_offset == SOC15_REG_OFFSET(GC, 0, mmDB_DEBUG2)) + return adev->gfx.config.db_debug2; return RREG32(reg_offset); } } |