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author | Chris Wilson | 2018-07-06 13:54:02 +0200 |
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committer | Chris Wilson | 2018-07-06 15:05:23 +0200 |
commit | add00e6d896fab882e6115ed4908b2456f1b3a85 (patch) | |
tree | eb79165a839f4ad807a463d3525cdf757e1387e5 /drivers/gpu/drm/i915/i915_gem.c | |
parent | drm/i915/selftests: Skip live_execlists if the GPU is terminally wedged (diff) | |
download | kernel-qcow2-linux-add00e6d896fab882e6115ed4908b2456f1b3a85.tar.gz kernel-qcow2-linux-add00e6d896fab882e6115ed4908b2456f1b3a85.tar.xz kernel-qcow2-linux-add00e6d896fab882e6115ed4908b2456f1b3a85.zip |
drm/i915: Flush the WCB following a WC write
If we have just completed a WC write, we must ensure that the WCB (Write
Combining Buffer) is flushed out to main memory before we can expect to
see the results. This is especially important when mixing WC with GTT as
the physical paths are different and cachelines are not naturally flushed.
Testcase: igt/drv_selftests/live_coherency #gdg
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180706115402.18547-1-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem.c')
-rw-r--r-- | drivers/gpu/drm/i915/i915_gem.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 0c0a1a959d0b..be63e8bbb6d2 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -837,6 +837,10 @@ flush_write_domain(struct drm_i915_gem_object *obj, unsigned int flush_domains) } break; + case I915_GEM_DOMAIN_WC: + wmb(); + break; + case I915_GEM_DOMAIN_CPU: i915_gem_clflush_object(obj, I915_CLFLUSH_SYNC); break; |