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| author | Ville Syrjälä | 2018-06-11 22:02:57 +0200 |
|---|---|---|
| committer | Ville Syrjälä | 2018-07-04 22:03:30 +0200 |
| commit | 78c357dd3fcf51de61a0b8db3abdb8ed5aea6dd8 (patch) | |
| tree | 3be7b5dd4204b1f571b3c2d4862cc63657034ed7 /drivers/gpu/drm/i915/i915_reg.h | |
| parent | drm/i915: Fix hotplug irq ack on i965/g4x (diff) | |
| download | kernel-qcow2-linux-78c357dd3fcf51de61a0b8db3abdb8ed5aea6dd8.tar.gz kernel-qcow2-linux-78c357dd3fcf51de61a0b8db3abdb8ed5aea6dd8.tar.xz kernel-qcow2-linux-78c357dd3fcf51de61a0b8db3abdb8ed5aea6dd8.zip | |
drm/i915: Fix pre-ILK error interrupt ack
Adjust the EIR clearing to cope with the edge triggered IIR
on i965/g4x. To guarantee an edge in the ISR master error bit
we temporarily mask everything in EMR. As some of the EIR bits
can't even be directly cleared we also borrow a trick from
i915_clear_error_registers() and permanently mask any bit that
remains high. No real thought given to how we might unmask them
again once the cause for the error has been clered. I suppose
on pre-g4x GPU reset will reinitialize EMR from scratch.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180611200258.27121-3-ville.syrjala@linux.intel.com
Reviewed-by: Imre Deak <imre.deak@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 69b9978d7dda..097000520a80 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -2871,7 +2871,6 @@ enum i915_power_well_id { #define I915_DISPLAY_PORT_INTERRUPT (1 << 17) #define I915_DISPLAY_PIPE_C_HBLANK_INTERRUPT (1 << 16) #define I915_MASTER_ERROR_INTERRUPT (1 << 15) -#define I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT (1 << 15) #define I915_DISPLAY_PIPE_B_HBLANK_INTERRUPT (1 << 14) #define I915_GMCH_THERMAL_SENSOR_EVENT_INTERRUPT (1 << 14) /* p-state */ #define I915_DISPLAY_PIPE_A_HBLANK_INTERRUPT (1 << 13) |