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| author | Imre Deak | 2015-06-01 09:32:01 +0200 |
|---|---|---|
| committer | Daniel Vetter | 2015-06-15 11:56:37 +0200 |
| commit | 66c826a1754c07012e29fbe9be7013e92a5acbac (patch) | |
| tree | 737eb8738acb68d04e0e4b0c0c8673f430135519 /drivers/gpu/drm/i915/i915_sysfs.c | |
| parent | drm/i915: Double the port clock when using double clocked modes with 12bpc (diff) | |
| download | kernel-qcow2-linux-66c826a1754c07012e29fbe9be7013e92a5acbac.tar.gz kernel-qcow2-linux-66c826a1754c07012e29fbe9be7013e92a5acbac.tar.xz kernel-qcow2-linux-66c826a1754c07012e29fbe9be7013e92a5acbac.zip | |
drm/i915/vlv: fix RC6 residency time calculation
The divider value to convert from CZ clock rate to ms needs a +1
adjustment on VLV just like on CHV. This matches both the spec and
the accuracy test by pm_rc6_residency.
v2:
- simplify logic checking for the CHV 320MHz special case (Rodrigo)
Testcase: igt/pm_rc6_residency
Signed-off-by: Imre Deak <imre.deak@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76877
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_sysfs.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_sysfs.c | 22 |
1 files changed, 7 insertions, 15 deletions
diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c index 247626885f49..55bd04c6b939 100644 --- a/drivers/gpu/drm/i915/i915_sysfs.c +++ b/drivers/gpu/drm/i915/i915_sysfs.c @@ -64,24 +64,16 @@ static u32 calc_residency(struct drm_device *dev, const u32 reg) goto out; } - units = 0; - div = 1000000ULL; - - if (IS_CHERRYVIEW(dev)) { + if (IS_CHERRYVIEW(dev) && czcount_30ns == 1) { /* Special case for 320Mhz */ - if (czcount_30ns == 1) { - div = 10000000ULL; - units = 3125ULL; - } else { - /* chv counts are one less */ - czcount_30ns += 1; - } + div = 10000000ULL; + units = 3125ULL; + } else { + czcount_30ns += 1; + div = 1000000ULL; + units = DIV_ROUND_UP_ULL(30ULL * bias, czcount_30ns); } - if (units == 0) - units = DIV_ROUND_UP_ULL(30ULL * bias, - (u64)czcount_30ns); - if (I915_READ(VLV_COUNTER_CONTROL) & VLV_COUNT_RANGE_HIGH) units <<= 8; |